02-03-2011 07:41 PM
First of all, manual says "The DDR2 device, a Micron MT47H64M16-25E or equivalent [...]". There is no "H" as third character. I assume this is an error in your posting.
Secondly, there is an entry for a memory device called "MT47H64M16XX-25E" in the MIG 3.61 in Coregen 12.4 but it is wrong. If you look up the datasheet of the MT47H64M16-25E, you will see that tRAS is specified as 45 ns for the -25E part and not 40 ns as in MIG. You can see the data in MIG when clicking on "Create custom part". The other parameter seem to be okay, though.
Thus, you will have to create you own corrected memory part in MIG.
The other options can be derived from the manual, the schematics or simply guessed:
Use extended MCB performance range (click to enable)
Frequency: 2.500 ps (400 MHz)
Output drive strength: Full strength (what else at 800 MHz data rate?)
RTT (nominal) ODT: 150 ohms (see e.g. here as we only have one device, i.e. one rank)
DQS# Enable: Enable (we have differential DQS for both bytes of the memory channel as can be seen in the Atlys manual page8: UDQS_P, UDQS_N, LDQS_P and LDQS_N; L/U: lower/upper byte DQS; _P/_N: positive and negated)
High Temp Self refresh rate: disabled (my memory does not operate in conditions > 85 °C; Do you guys know how hot 85 °C is in Fahrenheit? ;-) )
SSTL_Output drive strength: I have no idea. I left it at the default (SSTL_2)
Memory Pin Termination: Calibrated Input Termination (both pins can be found in the schematic and manual)
RZQ location: L6
ZIO location: C2
System clock: differential (isn't this required in the manual?)
Does anyone have ideas for the missing settings? I hope this helps...
02-03-2011 09:53 PM
All these information is very vital and should be in manual.
It boils down to trial-and-error which doesn't make sense when ones buys an "off-the-shelf tested" prto-board !
As board must have got tested for claimed 800MHz DDR2 access, I don't understand why these settings are not there in manual
02-03-2011 10:29 PM
I just took a short look at the Atlys_ManTest3_InitMemTest_Clean EDK project.They're using the MPMC Logicore to generate the memory controller and not the MIG. Furthermore, it seems they operate the DDR2 at 300 MHz there (not 400, i.e. 800 MHz DDR) with a memory part setting of "EDE1116AXX-8E" which not only differs from the Micron memory in the tRAS setting but also tRC. And they use and ODT value of "reserved/50Ohms", not 150.
What's the best setting? And why only 300 MHz?
02-13-2011 05:53 PM - edited 02-13-2011 05:55 PM
gloomy, which clock are you using? The on-board 100 MHz oscillator on the Atlys is single ended. Note that if you want to use a memory frequency higher than the clock you feed in, it's necessary to fiddle with the PLL parameters in the generated files.
Thanks for the tRAS timing tip! I wasn't sure about the ODT value either.
I found the documentation and generated test applications quite baffling (it seems like most people just use the EDK) and am working on a tutorial for using MIG with ISE, targeting the Atlys in particular. While it's not yet complete, I hope that it saves someone some time.
02-21-2011 05:00 AM
For those interested in a reference design for the Atlys board that is not EDK oriented,
I am porting the OpenCores OpenRISC ORPSoC for this board (http://opencores.org/openrisc).
Currently I have DDR2, ethernet, SPI and UART working and Linux booting.
At the moment I am working on the HDMI output.
05-28-2011 10:44 AM
I'm having alot of issues with MIG/DDR *and* Video at the same time. I can make DDR2 work no problems. Similarly for Video (i.e. XAPP 495). But when i try them together i get no signal on the TMDS ports. It seems something about the IOSTANDARDS set for the DDR causes the video to be optimised out of the design.
I can supply a demo project for anyone who wants to have a look.
05-29-2011 02:49 AM
The problem for anyone else stupid enough to hit the same problem is that the MIG defines DEBUG and the xapp495 output demo has `ifdef DEBUG statement. This causes the video to be non-functional and optimised out. Removing the debug blocks makes everything work.
05-29-2011 03:37 AM
your project sounds very interesting, thanks for this. I've downloaded the sources, jumped to the /doc directory, did a ./configure (which went well). But when I try to 'make pdf' it complains about 'texi2dvi' not found. I've installed tex-live, but I can't find texi2dvi (I'm using pdflatex normally). That's with Ubuntu 10.4. Do you know which package(s) I need to create the documentation?