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Visitor
rvndrlt
Posts: 5
Registered: ‎04-03-2012
0

ethernet on atlys

can somebody give me a tip on how to get ethernet up and running quickly on an atlys board? perhaps a design reference. no need for gigabit - 10/100 is fine. my goal is to send simple tcp/ip commands to it just to trigger led's or something. i've been reading over xapp1026 and it seems much more complex than what i'm looking for considering i'm not an expert with these. 

Visitor
derosafabrizio
Posts: 6
Registered: ‎12-04-2010
0

Re: Ethernet on atlys

Hi,

I saw from the dustsheet of your board that you have a Marvell Alaska PHY who supports GMII and MII interface, I will talk about MII just because I am more familiar.

 

U can set/read your PHY status via the pins MDC (clk) and MDIO (data input and output). This is a quite common interface for this kind of devices, you must read and write into registers to set parameters.

 

Remember that, in general there is an "active low" RST pin (and so you must set it high to activate the PHY).

 

You can set the speed, the auto-negotiation, ... of the link and I suppose you set 100MBit/s, MII, autonegotiation enabled.

 

Once you have done this, the 2 PHYs (computer and board) are automatically keeping the link alive (sending sometimes a little packet), you can see this because the status of the computer network interface changes to connected (most probably you can read "Unknown net").

 

Now you are pretty ready to send and receive bits!!!

 

You can read the data send by the computer when the DV pin is set to 1, in the same way, to transmit your data you must set the TX_EN pin to 1.

 

In the MII mode the CLKs are 25MHZ and on every rising_edge you must read/write 4 bits (also called 1 nibble) per clk cycle  on the RX(3 downto 0) and TX(3 downto 0);

 

For every byte you must send the less significant nibble first, so, if you want to send the value 16 (0x10), you will send:

 

0 0 0 0 (first clk cycle)

0 0 0 1 (second clk cycle)

 

If you have 2 boards, you can start sending simple data from one board to another to get familiar with this staff.

 

Now you must send something that the PC can understand....

 

Install wireshark (it is a sniffer) and remember:

 

On an Ethernet cable are running MAC frames.

A MAC frame can contain an IP packet.

An IP packet can contain TCP or UDP datagrams. (I suggest you to use UDP since it is much more simple)

 

You can find all the structure of frames,packets and datagrams on internet, just google it.

 

A couple of tricks

 

1) In general wireshark is showing you all the frame received WITHOUT: PREAMBLE, SFD and FCS (crc).

   That appens because this is all the MAC level is passing to WIRESHARK. 

   If you want to check your crc you can append to your frame 4 Bytes of garbage (no matter what) so that the MAC     

   erases them but is letting the CRC pass.

2)If you want to send packets all of the same size, to the same IP address, the IP checksum is constant and you can

    calculate it just once (even pen and paper are enough) avoiding to add extra logic on your project.

3)You can find VHDL codes for calculating the CRC (try this link:

   http://www.electronicdesignworks.com/utilities/crc_generator/crc_generator.htm)

  

 

 

If you need further information ask.

 

Fabrizio  

 

 

 

 

 

 

 

Expert Contributor
joelby
Posts: 1,056
Registered: ‎10-05-2010
0

Re: ethernet on atlys

There's an Ethernet reference design at this Digilent Atlys Resources page, though it uses a gigabit-only MAC (GPL licensed). For 10/100, I would recommend using the Xilinx MAC instead - a license for it comes with EDK the last time I checked.

 

TCP is a little complicated to do effectively without a processor, so something like XAPP1026 would be the way to go. UDP is pretty straightforward to do in pure HDL though. An improved, as-yet unpublished version of the above reference design also implements UDP reception - let me know if this is of interest to you.