7 Series FPGAs

[roeder_d]

Hi,

we plan to use an Artix 7 in a future project and we want to use the AES encryption function to protect the bitstream file.

In two Xilinx documents are contradictory information about this function.

DS180 - 7 Series FPGAs Overview (v1.6):

"... In all 7 series FPGAs devices, the FPGA bitstream, which contains sensitive customer IP, can be protected with 256-bit AES encryption and HMAC/SHA-256 authentication to prevent unauthorized copying of the design. ..."

UG470 - 7 Series FPGAs Configuration User guide (v1.1):

"... 7 series devices except for the smallest Artix™-7 devices have on-chip Advanced
Encryption Standard (AES) decryption logic to provide a high degree of design security. ..."

Does all Artix-7 devices supports the AES encryption or just the "larger" Artix-7?

thanks and regards

[barriet]

Good catch...

The original plan was the smaller Artix would not have the AES/HMAC and XADC blocks.

This was changed pretty recently - now all 7 series devices will be uniform in the support of these features.

bt