07-15-2013 03:12 AM
Hi, Xilinx Support
I encounter a problem when I generate GTX.
In spec, QPLLREFCLKSEL[2:0]
001: GTREFCLK0 selected
010: GTREFCLK1 selected
011: GTNORTHREFCLK0 selected
100: GTNORTHREFCLK1 selected
101: GTSOUTHREFCLK0 selected
110: GTSOUTHREFCLK1 selected
111: GTGREFCLK selected
I saw this value is 001b in gtwizard_v2_2.v, which means it select GTREFCLK0.
But in UCF,
NET Q6_CLK1_GTREFCLK_PAD_N_IN LOC=P5;
NET Q6_CLK1_GTREFCLK_PAD_P_IN LOC=P6;
NET Q7_CLK1_GTREFCLK_PAD_N_IN LOC=H5;
NET Q7_CLK1_GTREFCLK_PAD_P_IN LOC=H6;
it seems P5, P6, H5, H6 connected to GTREFCLK1.
I dont know where wrong.
07-15-2013 11:12 AM
Can you please let me know the part number of the device that you are targetting?
If possible, please post the screenshot showing the GTX settings. This info will give us a clue on what is wrong.
07-16-2013 02:05 AM
I don't see any attachments. Can you please reattach them?
07-29-2013 11:18 AM
Is your issue resolved? If no, please post the files.