7 Series FPGAs

[scott.a.holmes]

Is there any way to assign the CCLK configuration pin used for Master SPI Configuration Mode as user IO after the FPGA has been programmed.

Within our design we want to store both the configuration file, and user information within the one SPI Flash device and hence want to be able to drive the CCLK pin after configuration.

Device: 7K70T-1FBG484

[chenweit]

Scott,

Please check out STARTUPE2 in the libraries guide.

http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_4/7series_hdl.pdf

Please also ensure you do not set the persist option in bitgen.

Regards,

Wei

[fskalka50]

This is something we would alos like to do in our design.  The library guide does not give many details about how to use the STRARTUPE2 Block.  Is there a reference desing to reading user data out of the same SPI flash that is used to configure the device?

Fred Skalka