Hello,
This quite a beginner's question but I have not been able to figure out how to reset my CPLD (XC95288XL-10-FG256). Researching this function pointed me to set the GSR in one of two ways: Check the option in the Fit properties or specifically define it in the UCF constraints. After trying both way, I still cannot get my device to reset when I press the reset button. Despite checking the "Use Global Set/Reset" check box in the ISE Fit properties, the Fitter report says the following:
** Global Control Resources **
Signal 'Clk' mapped onto global clock net GCK1.
Global output enable net(s) unused.
Global set/reset net(s) unused. <------------- Still say unused
Here is a snippet of my VHDL code:
entity TopLevel is
Port(
Clk : in std_logic; -- Clk input 20MHz, 50ns period
PWM_In : in std_logic; -- PWM input active low
Reset : in std_logic; -- CPLD GSR input
Out : out std_logic
);
end TopLevel;
UCF contraints
Net "Clk" LOC = "M2";
Net "PWM_In" LOC = "D1";
Net "Reset" LOC = "C4" | BUFG = SR;
Net "Out" LOC = "B5";
Am I doing something wrong?
Please advise
Best Regards
HV
