CPLDs

[washix]

HalloO

I'm using the XC95144XL for a project.

Plz, I want to know if I don't use some of the CPLD IO pins in my HDL Code, what is the logic state of these pins after the fitting the code in CPLD? Which one of 0 or 1 or Z?

TanQ for ur HELP

[washix]

HalloO

I'm using the XC95144XL for a project.

Plz, I want to know if I don't use some of the CPLD IO pins in my HDL Code, what is the logic state of these pins after the fitting the code in CPLD? Which one of 0 or 1 or Z?

TanQ for ur HELP

[sandrao]

Have a look at the IO UG

http://www.xilinx.com/support/documentation/user_guides/ug445.pdf

The state for unused IO's is selected in SW. It can be either Float or Ground.