05-04-2012 02:58 PM
If I use impact from Xilinx to program the PLD through the board jtag connector with the *.jed file there is no problem. If I load up the jed file into the Super Pro 5000, and program the PLD, the device will not run. The programmed part will pass verification on both impact and the Super Pro. If I program a PLD with the Jtag connector and remove it from the device, it also passes verification. From the device behavior, I think the Super Pro is programming an incomplete file or it is not placed in the PLD in the correct place.
Does anyone have and idea of what may be wrong?
07-23-2012 02:35 AM
Do you have the latest firmware for the Super pro?
If you program with the Super Pro and then verify and read back with iMPACT does it start it working?
If you compare the readback .Jed with the original is that correct?