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Newbie
ali_rezaei
Posts: 3
Registered: ‎02-13-2008
0
Accepted Solution

WHat is GCK & GTS & GSR pins role?

WHat is GCK & GTS & GSR pins role? Can I use them as normal IO?
Xilinx Employee
ayang
Posts: 367
Registered: ‎07-30-2007

Re: WHat is GCK & GTS & GSR pins role?

I'm assuming you're asking about the CoolRunner-II or 9500XL. For other device families, the answer may differ.

GCK = global clock
GTS = global tri-state
GSR = global set/reset

These are pins that have access to global routing for these dedicated purposes. This minimizes skew for these signals and frees up general purpose routing resources for other logic.

If these special functions are not used, they can be used as general IO (but their global routing cannot be used for general purpose logic).

/Arthur
Newbie
ali_rezaei
Posts: 3
Registered: ‎02-13-2008
0

Re: WHat is GCK & GTS & GSR pins role?

I meant XC9500 series, so can you explain more about that ? I am implementing a CPLD evaluaion board and I want to know if there is possibility to use these pins as IO?
Xilinx Employee
ayang
Posts: 367
Registered: ‎07-30-2007
0

Re: WHat is GCK & GTS & GSR pins role?

The answer is the same for 9500.

/Arthur
Newbie
kprimerose
Posts: 1
Registered: ‎11-13-2011
0

Re: WHat is GCK & GTS & GSR pins role?

thank u very much