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Re: Why do I have to tie unused CMOS inputs to GND?
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07-03-2012 01:51 PM
The unfortunate truth is that CMOS consists of two complementary transistors, each
with a switching threshold based on the opposite power rail. For 5V CMOS, when
the input is around 2.5V both of these transistors are at least partially conducting.
This provides a path directly from Vcc to ground through the input transistors. If
you're very unlucky, the input transistors will match well enough that their output
(the center tap of the conducting path) will also sit at about Vcc/2 and cause a similar
issue in the next stage . . . etc.
You don't really know if the input leakage current is balanced between the rails
or if it tends toward either Vcc or Ground. A balanced leakage would tend to pull
the inputs to the threshold region where you draw lots of static power.
"Resistors are cheap"
-- Gabor
Wire-wrap plan
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07-04-2012 12:23 PM
Hi!
This post is mainly for my own planning.
I have now finished hard-wireing the supply for all IC's. I got to use AWG20 for all of them.
The connections from the Schmart-board will preliminary be of black AWG30 (I will use the same color here for all the pins because the supply is easily measured at the decoupling capacitors). All wires for the 208 pins will have to be cut for each pin individually. This is because I want it to look neat from above.
I will also have to cut and strip (AWG30):
30 Yellow 10(15)cm
30 Yellow 15(20)cm
30 Yellow 20(25)cm: PROM address
30 Yellow 25(30)cm
50 Yellow 30(35)cm: PROM outputs
I have borrowed an antique(!) wire-wrapping gun from work. When I have finished with the cut&strip I will solder some sockets on a separate board and practice until I'm an expert ;-)
Best regards, Roger
PS
I am attaching a picture of the CPLD supply wireing.
Do TTL-gates need pull-down?
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07-05-2012 01:25 PM
Now I have cut and stripped two lengts of the six I need (after some thought I decided that I want to have 50 of each). I did however miscalculate with regard to the necessity for grounding unused HCMOS inputs. The grounding alone needs more than 60 wire-wrap wires! I therefore need to cut and strip at least 50 more of my shortest length (5(10)cm).
I kind of wonder if TTL-gates would have simplified things.
I would also appreciate if someone explains the difference between CMOS and TTL for me with regard to logic levels. I have never seamed to understand this (CMOS is all I normally use, with Vcc/2 as the switching point).
Best regards, Roger
PS
I'm attaching my latest schematic which shows how terrible I've been with optimizing the number of neccesary capsules. The only benifit of my chosen approach is that I can separate the modules in whatever way I want.
Re: Do TTL-gates need pull-down?
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07-05-2012 01:37 PM
I did however miscalculate with regard to the necessity for grounding unused HCMOS inputs. The grounding alone needs more than 60 wire-wrap wires! I therefore need to cut and strip at least 50 more of my shortest length (5(10)cm).
If the unused inputs are truly " don't care ", then wiring to GND is not your only solution. You can connect such inputs to any logic signal or supply voltage. If you use a logic signal, make sure the additional loading on the signal will not result in timing problems (unlikely, given the basics of your design).
You can always order wire-wrap wire pre-stripped to desired length on eBay. Available in a variety of colours, no doubt!
I kind of wonder if TTL-gates would have simplified things.
No, unused TTL inputs are too susceptible to noise (you board is likely quite noisy).
Plus, did you really want to double or triple the size of your power supply to feed ancient and power-hungry TTL devices?
-- Bob Elkind
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369
Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
Re: Do TTL-gates need pull-down?
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07-05-2012 01:54 PM
Thank you Bob for your fast reply!
The problem does however remain.
It is an interesting option that I may tie an "don't care" to whatever level (not only fixed) I want but that does unforturnatelly not help me because I still need to tie it somewhere. And this costs wires. Wires and effort :-)
It is also an interesting point you are making with the TTL-gates. Didn't think so much about that :-)
Best regards, Roger
PS
Because I'm beginning to love photographing so much (I have even bought a new camera, a Nikon, but I have not opened it yet) I am sending you this:
Re: Do TTL-gates need pull-down?
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07-05-2012 02:22 PM
When I worked at my first job after college, we did a lot of wire-wrap jobs (some even were
shipped to customers as wire-wrap). The standard "Schottky" or "ECL" wire-wrap panels had
rows of pins on a 0.1 inch by 0.3 inch grid. That took care of most IC's available at that time,
which were either 0.3" or 0.6" wide. On either side of the board was copper that did not connect
to any pins. We would normally pick the top to be Vcc (+5 volts) and the back to be ground.
Then there were some little clips that looked like a "U" shape with a circular extension that
just fit perfectly around the socket pins. These were soldered to the pins before wire-wrapping
to make all of the ground and Vcc connections.
When using a copper-less breadboard with 0.1" by 0.1" drill pattern, you could interleave DIP
sockets and SIP bus bars. For the old logic circuits, having a GND bar near the pin one side
of the DIPs and a Vcc bar near the other side makes all of the power connctions really short.
And you could even use those two-pin jumpers you used to see on the back of IDE disk drives
to make the connections, because the pins were at 0.1" spacing.
A trick I use when making short wire wraps is to strip 2" off the end of the spool, then go back 1 more
inch and strip without pulling the insulation all the way to the end of the wire. In fact you want this
second stripped bit of insulation to be centered in the bare wire. Then cut off the wire. You can make
really short wrap wires this way well under 1 inch.
-- Gabor
Re: Do TTL-gates need pull-down?
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07-05-2012 03:01 PM
Hi Gabor!
Thank you for your reply!
I have however come to the conclusion that wires shorter than 2" insulation are hard to do. Connected to adjacent pins this will mean a 1" distance from the board. This will suffice for me.
I did unfortunatelly not understand your last paragraph. I just went ahead trying to make shorter wires and it was possible without any tricks. But I think I don't need any shorter wires.
The interesting thing with wire-wraping is excactly what you say, it may be used permanently. This is because no oxidation is possible due to the sharp edges of the pins which enable perfect connections at all times! If it wasn't for modern CAD programs and the ease (and price of) making printed multiple layer circuit boards, wire-wraping prototypes would still be used today! But it is a kind of shame that the socket prices are so high.
Best regards, Roger
Re: Do TTL-gates need pull-down?
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07-05-2012 04:38 PM
The interesting thing with wire-wraping is excactly what you say, it may be used permanently. This is because no oxidation is possible due to the sharp edges of the pins which enable perfect connections at all times!
Yes, when properly done, wire-wrap results in what are called "gas-tight" connections.
Commenting on Gabor's post... Many 1960s and 1970s high-performance production ECL10K mainframes were designed with either wire-wrap backplanes or both wire-wrap backplanes and mainboards. ECL10K is quite wire-wrap friendly, as (nearly) all ECL10K outputs were designed to drive 50-ohm parallel termination, and ECL10K technology was designed for moderate (roughly 5nS risetime, swinging roughly 1V) edge rates. On the other hand, I would think that straight Schottky TTL (with blazing fast 5V edges and unterminated lines) would be a pig for wire-wrap interconnect.
-- Bob Elkind
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369
Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
Re: Do TTL-gates need pull-down?
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07-06-2012 01:57 AM
The eurocard-rack ASIC emulators had soldered wires, using enamel-insulated wire for the signals, and very short wire jumpers for VDD and VSS.
------------------------------------------
"If it don't work in simulation, it won't work on the board."
Re: Do TTL-gates need pull-down?
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07-06-2012 05:29 AM
For MIL-spec wire-wrapping, you couldn't use the all-in-one guns. This had to do with
insulation requirements for the "modified wrap" - a sort of strain-relief made by wrapping
the insulated wire around the post. In my recollection, the guns that just fed wire used
enamel-insulated wire which didn't need stripping, and could be daisy-chained easily.
It also broke easily...
-- Gabor











