02-11-2012 07:45 AM
I have a working Microblaze platform with an AXI External Master Connector IP linked to an AXI4 bus, sharing master access to DDR3 memory with the microblaze AXI.DC bus. The platform is basically self-sufficient, except for a little custom VHDL module to drives the slave side of the AXI External Master Connector.
I had no problem creating the VHDL to fill chunks of memory with some dummy test values using a bunch of consecutive single-access transactions but now, I'd like to use bursts transactions.
My custom module seems to be working fine. The burst starts OK with the address of the first memory location to be written to and AWVALID, waiting for AWREADY. Then, data is output onto WDATA along with WVALID. WREADY is already high, such that the first transactions occurs as expected. In fact, the first 36 transactions occur OK but then, RREADY goes low causing the burst to hang on transaction 37, waiting for WREADY to go high again. But WREADY never goes high again.
My AXI External Master Connector has a built-in 32 word write FIFO. I guess that the above 36 number is 32 + 4 other registers that are piping the data from the slave-side to the master-side of the Connector IP.
Using the Microblaze to read the memory array that was supposed to be written to by the custom module returns erroneous data. None of the first 36 transactions completed succesfully. No data reached the memory.
From the AXI specifications, I noticed that a burst transaction can't go across 4KB-page boundaries. My stuff does not violate that restriction. I'm trying to write 4KB (1024 32-bit words) at x"C0080000".
My custom module sets things as follow:
. AWLEN[7:0] = 255 (for a 256 32-bit words burst)
. AWSIZE[2:0 = b"010" (4 bytes per data transfer)
. AWBURST[1:0] = b"01" (INCRemental mode)
1. Any idea of what is causing the burst to hange and the first 36 accesses not to reach the memory?
2. Is there a relation between the above parameters and those of the memory? For example, my memory IC supports BL8 bursts. Does that mean that AWLEN[7:0] shall not exceed 7?
Thanks for helping!
04-02-2012 11:50 PM
I too facing the same problem. I have gone through your other posts regarding this same project, looks like u solved this problem. Can u give me any pointers to over come this.