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Visitor
fvazquez
Posts: 8
Registered: ‎11-09-2010
0
Accepted Solution

Gigabit Hard Temac Core in Virtex-5 FX100: Tx/Rx packet lengths

Hello,

 

I have set-up 2 Gigabit TEMAC cores in a FX100 Virtex-5 on a HighTechGlobal platform (HTG-PCIe-100) with 2 Gigabit Ethernet ports. Both TEMAC cores operate successfully when connecting the corresponding Gigabit Ethernet PHY to a host computer. I am able to receive and transmit packets, but the following problems appear:

 

1- the packets sent from the host computer with less than 60 bytes are received with 60 bytes at the FPGA, somehow the TEMAC adds 0's at the end of the useful data-payload. Everything works fine with packets containing more than 59 bytes.

 

2- the same occurs when transmitting a packet with less than 60 bytes, the TEMAC adds 0's bytes up to filling a 60 bytes transmitted to the host computer. Everything works fine with packets containing more than 59 bytes.

 

3- I want to make a loop among my two Gigabit Ethernet connectors, so that what I transmit with port 0 is received in port 1, and viceversa. I use the same cable as in the connection between computer and the FPGA board. This configuration does not work, the receiver ethernet port always receives a 16 bytes packet!!! and it seems that the data-payloas for those 16 bytes is correct, but of course, a lot of bytes are lost in the reception...

 

Thanks in advance for your support.

Regards

Xilinx Employee
mcgett
Posts: 3,567
Registered: ‎01-03-2008

Re: Gigabit Hard Temac Core in Virtex-5 FX100: Tx/Rx packet lengths

Ethernet packets have a minimum size of 64 bytes this includes the header, user data and FCS.  If the user data is less than 46 bytes it has to be padded to meet the minimum size.

 

Preamble

Destination MAC address

Source MAC address

Type/Length

User Data

Frame Check Sequence (FCS)

 

8

6

6

2

46 - 1500

4

 

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Visitor
fvazquez
Posts: 8
Registered: ‎11-09-2010
0

Re: Gigabit Hard Temac Core in Virtex-5 FX100: Tx/Rx packet lengths

Mcgett,

 

thanks for your fast answer solving points 1 and 2.

 

But what about point 3?

 

My board includes 2 Marvell Alaska Gigabit PHY devices (88E1111), each of them interfacing to a TEMAC core. I just connect both PHY in order to test communication between my 2 TEMACs, I transmit a 100 bytes frame from TEMAC 0 to TEMAC 1, but TEMAC 1 just receives 16 bytes!!! any possible problem related to autonegotiation during the initialization of the link?

 

Xilinx Employee
mcgett
Posts: 3,567
Registered: ‎01-03-2008
0

Re: Gigabit Hard Temac Core in Virtex-5 FX100: Tx/Rx packet lengths

I'm not an ethernet expert, so I can't help with the 16 byte problem.  Since the loss is between two Marvell PHYs you may want to give them a call and ask.

 

Other items to consider:

1) Is there something in the truncated packet with the 16-byte data payload that indicates the problem?

     - Maybe the PHY is throwing the data away due to address filtering?

2) Is the cable that right type for this connection?

       - I'm not sure if normal or patch is required in this case

       - Some PHYs (maybe in your PC) can swap the TX/RX pairs to fix cable issue, but your configuration of the Marvell PHYs may not

3) The data is stuck in a FIFO.  This is less likely if you are sending lots of 100 byte frames

 

Again, I'm not an ethernet expert and I can't help much in this case beyond soome guesses.

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Visitor
mrpink
Posts: 3
Registered: ‎04-01-2011
0

Re: Gigabit Hard Temac Core in Virtex-5 FX100: Tx/Rx packet lengths

@fvazquez

 

Hi,

 

my name is Christopher and i would be interested in how do you send the raw packets and how do you generate the crc. Can you give me a short example? I have problems with understanding the temac address swap tool (example design), when i receive a frame, the frame wasn't sending back.

 

I use a virtex 5 chip.

 

Thanks

Christopher

 

P.S. Sorry for my english speaking :)

Visitor
fvazquez
Posts: 8
Registered: ‎11-09-2010
0

Re: Gigabit Hard Temac Core in Virtex-5 FX100: Tx/Rx packet lengths

Christopher,

I just substituted the "address swap module" with my own logic. You just need to understand the local-link interface (with sof, eof, etc) and create a module which sends/receives data to/from the TEMAC module through the local-link interfaces. That's all.

Regards,

F. Vázquez