02-04-2010 01:26 AM
I am using rocketio for board to board communications over a VXS backplane. The FPGA that I am using is a xc4vfx20, version 6.
I am testing using the example design that is generated by the coregen.
I have successfully tested the parallel and serial loopback modes.
The next test I do is an external loopback in which I employ a switch that resides on the VXS backplane to send back data that it receives.
I know that the switch works as I have done a similar test with a virtex 5 device.
It is at this point that I experience difficulty - the data that is received seems to be random.
The settings that I employ are:
8B/10B encoding is enabled
Comma allignment ,clock correction, crc, channel bonding is disabled.
(Although I have attempted with comma allignment and clock correction enabled but the same result is obtained)
The reference clock is 156.25MHz and the line rate is 3.125Gbps.
My question is for any advice as to how I should proceed from here and more generally are the xc4vfx20 devices known to be problematic with respect to rocketio.
02-04-2010 08:14 PM
A couple of things.
1) If you are sending 8b10b encoded data then you must send and receive comma alignment characters or your data will not be aligned to the 10b boundaries and result in bad 8b data.
2) You may have poor signal integrity in the channel from the device to the switch and then back again. If this is a simple eye height loss then you should be able to fix it by increasing the output swing and if there is a lot of loss by using TX pre-emphasis. However, if the signal integrity issues are a result of poor PCB that has resulted in significant discontinuities, cross talk or impedence mismatches there is little that can be done except to spin the PCB to fix the issue.
Have you tried typing your question into Google? If not you should before posting.
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