Connectivity

[y4664]

hi all, i'm using virtex-5 LX110T boards. i implemented TriMode Ethernet Wrapper as following steps:

1-) Create Virtex5 TriMode Ethernet Wrapper with SGMII

2-) Open ISE and add coregen files (v5_example_design as top_level)

3-) Update UCF file as :

# Place the transceiver components. Please alter to your chosen transceiver.
INST "*GTP_DUAL_1000X_inst?GTP_1000X?tile0_rocketio_wrapper_i?gtp_dual_i" LOC = "GTP_DUAL_X0Y4";
 
INST "MGTCLK_N" LOC = "P3";
INST "MGTCLK_P" LOC = "P4";

##GMIII
Net "TXP_0" LOC = "M2";
Net "TXN_0" LOC = "N2";
Net "RXP_0" LOC = "N1";
Net "RXN_0" LOC = "P1"; 
 ## PHY Reset pin  
NET "PHY_RESET_0_pin" LOC = "J14";   
NET "RESET" LOC="U8";

# PHY Autonegotiate ON  
INST *?v5_emac EMAC0_PHYINITAUTONEG_ENABLE = TRUE;

4-) Add PHY_RESET_0_pin  pin as output in Top_Level

5-) PHY_RESET_0_pin<=not reset_i;

6-) Change Jumper Ethernet

when i implemented design to my board  the RX led can perform (on/off )  but TX led is contionusly off mode. 

 when i  used ping google.com   command, i can see packet send to FPGA board but anything recieve from FPGA.

i connected FPGA board direct my LAPTOP with RJ45.  

[deepeshm]

The following answer record might be helpful to debug your issue:

http://www.xilinx.com/support/answers/43330.htm

Thanks,

DMS

[y4664]

Actually,  i confused about which steps i must follow to implement EMAC warapper in ISE without using EDK example_design UCF file is contain PİN for EDK designer. My design already  is not working because the  board recieving  package all times if we didn't implement any bit file : )

Now please help me for use EMAC wrapper in ISE without EDK. . . İ can't use UCF file from example design because i think  this UCF file can use for EDK ..

[sushantm]

Hello friend,

Can I know you are using simple TRI-Mode Ethernet MAC i.e(soft IP) or Embedded Tri mode Ethernet MAC which is available as hard ip in Virtex-5.

I would like to request you to generate a simple eample design with your devlopment board type or else write your own ucf,if you have a custom board.

Then try to make one ISE project and those files there.

if you face any issues then do let me know.

Thanks,

Sushant

[y4664]

i'm using Vİrtex5 Embedded TRI-Mode Ethernet MAC but there is available TRI-Mode Ethernet MAC i have Virtex 5 OPENSPARC LX110T board thank you

[y4664]

i'm still waiting your reply.. i didn't solve my problem. it will make me crazzy

[y4664 · Accepted solution]

i think my problem is about my Ethernet Card  because my Ethernet Card is Fast Ethernet that means i can't use SGMII or GMII and i tried implement Ethernet MAC Wrapper with MII interface. This worked. i can see send package and recieve package From FPGA-->PC  and PC--->FPGA

But why  TX led alwayss on  i don't know. it seems i solved my problem at now... Thankss y4664 :)  

[sushantm]

Hey,

Its glad to know that you solvd the issue.

Thats right if your PC is not having fast ethernet port 10/100/1000 mbps then you have to use MII interface for 10/100 mbps.

Tx led is continously high means it is transmitting continously.

Ideally when the link is established it send/receive data some (arp/null) packets,you can use network protocol analyser to view the same.

Sorry for the delay.

Thanks,

Sushant

[y4664]

hi, sushantm  thank you. Now i want to use UDP sender instead of adress_swapp. What do you suggest about this step

[rcingham]

Assuming that you know the Destination MAC and IP addresses, writing a module to generate the appropriate UDP and IP headers is fairly straight-forward exercise in state-machine design.

I would recommend sticking with IPv4 for the moment, and sending a null checksum in the UDP header.