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XAPP1014 Looking for VHDL or Verilog File
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06-26-2012 08:55 AM
Hi,
I am looking at the GTX demo example and would like to simulate this Demo. Unfortunately, the DRU file is only available as
a ngc file with a verilog wrapper. This makes it impossible to use a NON ISM simulator. Is there a Verilog and/or VHDL file available?
Thank You,
Gary
Re: XAPP1014 Looking for VHDL or Verilog File
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06-26-2012 10:30 AM
Can you use netgen on the ngc to create a sim model?
Re: XAPP1014 Looking for VHDL or Verilog File
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06-26-2012 01:06 PM
Hi,
This is something I did not know about. How do you use Netgen? Can I create a VHDL or Verilog file that might be synthesizable also so I could get rid of the ngc file.
Thank You,
Gary
Re: XAPP1014 Looking for VHDL or Verilog File
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06-26-2012 01:21 PM
Hi Gary,
Yeah, you can use netgen to generate simulation models. See the Command Line Tools User guide for more info (UG628).
In short, I usually use:
netgen -sim -ofmt vhdl <netlist_name>.ngc <output_name>.vhd
or
netgen -sim -ofmt verilog <netlist_name>.ngc <output_name>.v
That's from memory though, so I might have missed something!
No, netgen us really used for generating simulation models from NGC files, not synthesizable code.
Re: XAPP1014 Looking for VHDL or Verilog File
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06-27-2012 08:35 AM - edited 06-27-2012 08:36 AM
Hi Bwiec,
Your command does work. The file being a .ngc file is a simulation file. I guess that means this ngc models the behavior of the GTX recover Data Logic. for simulation purposes only.
The result of Netgen produces verilog and VHDL files that are encrypted.
My Simulator can not read the encrypted file. Am I stuck, I am using the Aldec Simulator. Would ISIM work with this file or
Modelsim.
Thank You,
Gary











