02-27-2012 09:19 PM
I'm using Aurora v5.2 configured as full duplex, 2.125Gb/s, 4 byte, no FC, 1-lane targeting the V6 on the ML605. The fix for CC is implemented and verifed. The core works great when looping back TX to RX. I can disconnect the TX/RX and plug it back in and the core re-intializes with lane_up and channel_up asserting.
However, when I switch from loop back to another ML605 (via optical switch), thus breaking the channel and switching to another TX/RX channel, the core never re-intializes the link.
Chipsope shows the link to be in an infinite re-initialzation loop. Channel_up and lane_up assert high for a short period, deassert and repeat... Txlock to the MMCM is always asserted high (txlock is negated to MMCM per GTX Guide). I never see the MMCM lock assert and I assume that something happens to the GTX txoutclk that the MMCM does not like.
Should I be using TX/RX simplex mode when switching to different ML605s?