Hi,
I am trying to read registers from a custom AXI lite peripheral. Unfortunately it seems that I can only read once; subsequent transactions don't work. Turns out that the address decoder is not recognizing the address as valid (see attachment), but it is valid (since the first transaction works, I can check that).
The signal "address_in_erly" from the IPID address decoder is not asserted high for any other than the first transaction.
I noticed also that the wizard does not fully respect the specifiation and fixed theses things. E.g. the spec says that the entries in IPIF_ARD_NUM_CE_ARRAY shall be powers of two --- when one selects "3 software accessible registers" in the wizard GUI, then it generates USER_SLV_NUM_REG to 3 and this woild violate the spec. Anyhow...fixing that doesn't help either.
It looks like this is a bug in the address decoder. The signal "address_in_erly asserts once at 1150ns and never again, same time the chip select signals are staying invalid.
Any idea why the decoder seems to be stuck?
Thanks in advance,
martin
