05-29-2012 04:40 AM
I want to implement the translate function of CORDIC algorithm. I created a simple testbench with sinus and cosinus input signals and expected a (more-or-less) constant magnitude output.
I attached my simulation results and hope that somebody can give me a hint what i'm doing wrong.
Thx for your help
Solved! Go to Solution.
05-29-2012 04:29 PM
What is the meaing of chopping the signal by interrupting enable? Does the behavior stay the same when using const enable?
Did you use any time scaling / sampling or saturation for the ports?
Can you observe the same output which the wave window on FPGA signal level?