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[murtaza5152]

Hi,

I am trying to synthesize a simulink model for a Virtex-6 240T -1 ff1156 chip. Though the top level ngc file generated is for this device, the instantiated modules' .ngc files are apparently not generated for this target. I know this because when I try to add these files to the project , it gives me a warning :

The file "xxx" device information, 6vcx75tff484-2, does not match the current project device, xc6vlx240tff1156-1.

I am bewildered as to where does the 6vcx75tff484-2 device come from? Does it just take that on its own randomly!? Bug?

Would this mismatch cause trouble during mapping? 

Thanks.

Murtaza.

[chrisar · Accepted solution]

This is most likely because some of the cores are just using a default setting instead of generating for the specific device.  Since both targets are Virtex-6, you should be able to safely ignore this warning.

There are times when this could be a concern, for example if you have differnt pins, or Trasceivers, etc.  But for designs that are primarly Logic (LUTs, FFs, DSPs, and Block RAM) it shouldn't be a problem.

[murtaza5152]

Thanks Chris.