DSP Tools

[kumar.anand743@gmail.com]

hi there :-)

I had a problem in using verilog modules containing sub-modules and i suspect my matlab configuration file is improper.

I included the submodules in the matlab configuration fie using the command  'this_block.add_file('<name of the submodule>.v')

but still while simulating the design there is an error reading "there are unknown files/instances ".I had even included all the verilog files in my matlab directory.

Is there anything else I need to add to my matlab configuration files?

any suggestions are appreciated :-)

Thank you :-) 

[ywu]

Adding the submodule files via add_file should be all that you need. Which simulator are you using? Is it possible to post your _config.m file?

[kumar.anand743@gmail.com · Accepted solution]

hi jim :-)

       The veriog module containing submodules seems to be working.

        I suppose I had added the command this_block.addfile('<filename.v>')  for the submodules after the command of this_block.addfile('<top_module.v>').  I added the submodule addfile commands ahead of the topmodule commands and now it seems to be working fine :-)

Thank you :-)

[kumar.anand743@gmail.com]

hi jim :-)

         I had another question.

         everytime I change the verilog source code is it necessary to change the matlab configuration file as well ?

[vora.dimple]

Yes you to need to change the config also, if u change the verilog source code. The config file has to updated about the changes in the code.