04-13-2012 01:05 AM
There is a short description of this option in System Generator Reference Guide:
"Test for optimum pipelining: Checks if the Latency provided is at least equal to the optimum pipeline length."
So this option allows you to check that parameter Latency is higher or equal to the minimum value that is optimal to speed optimization.
If it's lower then optimal value, then Simulink shows error message.
Try to set Latency = 0, check Test for optimum pipelining option and simulate (or generate bitstream). It will show an error.
04-17-2012 05:54 AM
Thanks a lot, Vitaly. I indeed want to see what Simulink will show if "Test for optimum pipelining" is checked.
I tried your suggestion, but no error was shown in simuliation and bitstream generation... What else can I try?
04-17-2012 06:27 AM
Lets build a simple model. E.g., target FPGA: Spartan6 xc6slx9-3csg225.
Add one 'Mult' block, two 'Gateway In' blocks and one 'Gateway Out' block.
Set properties of the Mult block as following:
- Precision = Full,
- Provide enable port = Unchecked,
- Latency = 0,
- Optimize for = Speed,
- Use embedded multipliers = Checked,
- Test for optimum pipelining = Uncheked.
Try to simulate this model. Everything should be OK.
Then lets change Test for optimum pipelining = Checked. (Latency should be equal to zero.)
Try to simulate again. You should get an error:
Latency is set to a value of 0, but the value must be greater than or equal to 2. Error occurred during "Rate and Type Error Checking".