Sorry for the naive question, but how do I capture a schematic with a D and J-K FF that do have negated Q? I tried to draw the schematic with WebISE 13.3 and there is not such a thing readily available.
Well, presuming that both a simple D-FF and a simple inverter exists, I would recommend following the D-FF Q output with an inverter. As for the J-K-FF ... why would anyone wish to relive the 'glory' days of the 7473 ?
-- Bob Elkind
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README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369
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