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ISE13.4: How do display the schematic underlying a Xilinx library symbol
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05-24-2012 12:09 AM
Hi,
after changing from ISE10.x to ISE 13.4 we came across some unecpected behavior.
When pushing into some predefined library symbol (e.g. m8_1e) now some VHDL source is opened, while in ISE10.x a schematic was opened.
Even changing the design flow from HDL to SCHEMATIC did not change this behavior.
The schematics are still stored in the ISE installation (e.g. $XILINX/ISE/spartan6/data/drawing/m8_13.sch).
What must be done to make the schematic editor push into the schematic again instead opening the HDL source?
Kind regards
eilert
Solved! Go to Solution.
Re: ISE13.4: How do display the schematic underlying a Xilinx library symbol
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05-31-2012 11:59 PM
Research Fellow
University of Calcutta, India
Re: ISE13.4: How do display the schematic underlying a Xilinx library symbol
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06-01-2012 05:51 AM
Hi,
this "cure for almost everything" doesn't work here.
I'm not trying to access self drawn schematics, but the schematics provided by xilinx for complex logic functions like multiplexers etc.. These are not stored in the project folder and also not referenced there in any way.
Also, the HDL sources that are opened are *.vhd files, not *.vhf files.
Regards
Eilert
Re: use: How do display the schematic underlying a Xilinx library symbol
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06-12-2012 02:59 PM
The format of the underlying macros is device family dependent.
Newer families use HDL macros rather than schematic macros.
There is no supported way to change it the editor to use schematic macros for devices that now use HDL macros.
Re: use: How do display the schematic underlying a Xilinx library symbol
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06-12-2012 03:46 PM
If you are interested, the selection of Schematic or HDL is controlled by the level attribute of the symbol.
Look at the symbol properties and you will see that the level is HXILINX or MXILINX. Any Xilinx Macro symbol with a property of HXILINX will look for an HDL file rather than a schematic file when being pushed into of when the schematic is converted to an HDL file for synthesis. The HDL macro files are located at :$XILINX/verilog/hdlMacros and $XILINX/ISE/VHDL/hdlMacros.
As you've discovered, many of the schematic drawings are still available even though they are not being used. If you created a new library symbol or edited the Xilinx library symbol to change the Level to MXILINX you could get the schematic macros to show up. It is not supported because this flow is no longer tested for macros that have been converted to use HXILINX.











