Design Entry

[syalk1120]

Hi,everyone.

I wanna initialize the array registers in verilog code for implementation, such as  [25:0] data[31:0], how should I do? THX.

[ywu]

Take a look at the thread below:

http://forums.xilinx.com/t5/Virtex-Family-FPGAs/How-to-make-ROM-using-block-RAM/m-p/20628#M1954

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syalk1120 wrote:

Hi,everyone.

I wanna initialize the array registers in verilog code for implementation, such as  [25:0] data[31:0], how should I do? THX.

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[syalk1120]

Thanks,Jim.I have added the initialize code,but it comes out such error "Address xx is invalid in call of system task $readmemb."  whatever I changed the address,the error  existed. what 's the matter with my code?  my initialize code is as following:

reg[21:0] ram[31:0]

initial
begin
 $readmemb("ram.mif",ram,0,31);
end

ps: the "ram.mif" is the binary code in 22*31bits.

[ywu]

Can you attach ram.mif file?

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syalk1120 wrote:

Thanks,Jim.I have added the initialize code,but it comes out such error "Address xx is invalid in call of system task $readmemb."  whatever I changed the address,the error  existed. what 's the matter with my code?  my initialize code is as following:

reg[21:0] ram[31:0]

initial
begin
 $readmemb("ram.mif",ram,0,31);
end

ps: the "ram.mif" is the binary code in 22*31bits.

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[syalk1120]

Thanks,Jim.

I have attached "ram.mif"file,pls check it.

[ywu · Accepted solution]

The old parser in XST is very picky. You will need to get rid of unwanted white spaces, especially the "Tab" character, at the very end of the file. Make sure the ram.mif file has exactly 32 lines.

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syalk1120 wrote:

Thanks,Jim.

I have attached "ram.mif"file,pls check it.

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[syalk1120]

Thanks,Jim. It's done now.

[ywu]

Great to hear that. Just so you know there are a couple of more restrictions on the memory initialization file format mentioned in the blog blow in case you run into those:

Memory Initialization Methods

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syalk1120 wrote:

Thanks,Jim. It's done now.

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