Design Planning

[foucher]

Hi,

I'm using ISE 12.1 to generate a design.

I use XPS to prepare the static part of the design.

Then, I switch to PlanAhead to add reconfigurable areas to replace black boxes in my IPs.

This procedure have been tested and validated upon many designs.

But in one design, PlanAhead fails telling a "PAR error".

But when I look to the PAR report, I have the following :

Generating Pad Report.

All signals are completely routed.

WARNING:Par:283 - There are 166 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.

Total REAL time to PAR completion: 2 mins 12 secs
Total CPU time to PAR completion: 2 mins 18 secs

Peak Memory Usage:  1012 MB

Placer: Placement generated during map.
Routing: Completed - No errors found.
Timing: Completed - No errors found.

Number of error messages: 0
Number of warning messages: 169
Number of info messages: 2

Writing design to file config_1_routed.ncd



PAR done!

Also, unroutes report says "All signals are completely routed."

Do you have any idea where could I search for the error?

Thank you.

[foucher]

Hi,

I'm using ISE 12.1 to generate a design.

I use XPS to prepare the static part of the design.

Then, I switch to PlanAhead to add reconfigurable areas to replace black boxes in my IPs.

This procedure have been tested and validated upon many designs.

But in one design, PlanAhead fails telling a "PAR error".

But when I look to the PAR report, I have the following :

Generating Pad Report.

All signals are completely routed.

WARNING:Par:283 - There are 166 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.

Total REAL time to PAR completion: 2 mins 12 secs
Total CPU time to PAR completion: 2 mins 18 secs

Peak Memory Usage:  1012 MB

Placer: Placement generated during map.
Routing: Completed - No errors found.
Timing: Completed - No errors found.

Number of error messages: 0
Number of warning messages: 169
Number of info messages: 2

Writing design to file config_1_routed.ncd



PAR done!

Also, unroutes report says "All signals are completely routed."

Do you have any idea where could I search for the error?

Thank you.

[woodsd]

I agree that the PAR report you provided completed successfully.  Without more information it is hard to guess what may have happenned, but I would check a couple things:

• In the Design Runs window, do you have a run that is marked as "Par Error"?  If so make sure you grab the par report from the correct run.  For instance if "config_2" is marked as failing, there may be a directory called "config_2" as well one called "config_2_1" in the ".runs" folder.  This can happen by resetting runs an not removing the data.  In this case, you need to make sure you are looking in the folder that is currently being used by planAhead.
• Check the PlanAhead.log file and see if you see a PlanAhead error in there.  The error you got may have been a planAhead error, and not a Par error.  

If you still can't figure this out, you may need to reset the failing run, rerun, and provide more details on exactly what the message was.

I hope this helps!

[foucher]

This is the correct run for sure: I rebuilt the PlanAhead project from scratch to be sure of the error.

But I'll check the PlanAhead.log file:you're right, it may be a PlanAhead error occuring during the PAR phase, and so reported as a PAR error.

Thanks for your help, I'll post here again when I have read the file.

[woodsd]

There should also be a "runme.log" file in the implementation directory.  There are a couple of tools that run after par (timing, xdl, and optionally bitgen).  It is possible that one of these failed as well.  If the planAhead.log doesn't show anything, then try to look in the "runme.log"

[foucher]

You were right: the error, while reported as a PAR error, occurs after the PAR process.

The runme.log file indicates:

Generating Pad Report.

All signals are completely routed.

WARNING:Par:283 - There are 166 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.

Total REAL time to PAR completion: 2 mins 12 secs
Total CPU time to PAR completion: 2 mins 18 secs

Peak Memory Usage:  1012 MB

Placer: Placement generated during map.
Routing: Completed - No errors found.
Timing: Completed - No errors found.

Number of error messages: 0
Number of warning messages: 169
Number of info messages: 2

Writing design to file config_1_routed.ncd



PAR done!
./ISEWrap.sh: line 51:  9429 Segmentation fault      $ISE_STEP $* >> $HD_LOG 2>&1

It seems an internal error of a post-PAR tool.

I tried reinstalling the environment and cleaning all files in ~/.Xilinx but error still happens.

Line 51 of ISEWrap.sh indicates "wait $ISE_PID", but text reffered to ($ISE_STEP $* >> $HD_LOG 2>&1 &) is located at line 31.

Is it possible it is a problem outside PlanAhead, or do you think it is linked to the tool?

[woodsd]

I haven't seen this.  I don't know the cause.  Is it possible for you to upgrade to the latest tools?  This may be a problem with the 12.1 tools, plus there have been many enhancements and fixes to the PR solution since 12.1.  Since PR is a cutting edge technology, we strongly recommend that you stay current with our software.

[foucher]

Now that I see where the problem is, I'll investigate it.

I couldn't upgrade to tools more recent, since there were other problems that prevented me from building a functionnal design using my flow.

Anyway, I should check the recent 13.4 version, since these bugs may have been solved.

Thank you for your help and for enabling me to locate the problem.

[tecepe]

Hello

I have the same problem here.

Two months ago a project was fully functional, but stopped working this week, when I had to recompile it, accusing:

. / ISEWrap.sh: line 51: 30294 Segmentation fault (core dumped) $ ISE_STEP "$ @">> $ HD_LOG 2> & 1

despite being the code shown in line 31 the script ISEWrap.sh.

Tested in version 13.2 of Planahead, which was the original, and the latest version, 13.4. My version is GNU / Linux.

What kind of information you need so that I can help you guys help me?

[nezhate]

Hi!

I have the same error. I'm using PlanAhead 13.4 under Fedora 15.

When TRCE is executed, this error occurs. 

To work arround, do this:

 - Launch your implemetation normally as you do before.

 - Wait for "implemetation failed"

 - In command line, open the runme file loctaed on : your_project/your_project.runs/impl_1/

 - Comment out all the lines but the two last ones that begin with EASTEP.

 - Run the runme.sh script

You will notice that PlanAhead will get the feedback from the commands being executed and will endup the process successfully.

[sebastianr]

Hi,

although the last post lies few months in the past, I hope, someone can still help me. I have exactly the same problem with planAhead (13.4) under Fedora 16. I tried the workarround described by nexhate, but it results in exactly the same error.

Only to be sure. I only commented out three lines of the last 5 lines in the file:

#EAStep ngdbuild ...
#EAStep map  ...
#EAStep par  ...
EAStep trce  ...
EAStep xdl ...

All the other definitions/declarations in runme.sh I left untouched.

EDIT: Now, this workarround also works for me! Can't say, what exactly the reason is. I also made some changes with the usg driver for the jtag cable and so on.

regards,

Sebastian