05-12-2012 11:56 AM
I am trying to use PR flow in Plan Ahead
I have 2 PR regions defined.
In my first configuration I have a snythesized .ngc in each of these two regions and the PR flow ran successfully
In my second configuration I have one PR region as a Black Box and the other PR region with the same .ngc as before. This run is however failing giving an error
ERROR: [Designutils-146] Can't remap macro primitive type OBUFDS_DUAL_BUF; didn't find cell OBUFDS in lib hdi_nonprimitives
I opened up the runme.log and this is what it says:
ERROR:NgdBuild:1396 - IOSTANDARD value 'DUAL_BUF' is not valid for block
'u_obuf_ck' of type 'OBUFDS'. Original block type was 'OBUFDS_DUAL_BUF'.
Is this a known issue in Plan Ahead? Is there a work around?
05-13-2012 08:11 AM
What version of ISE? It sounds like you have chosen an IO standard that doe not exist at all.
Can you build each version of the design wthout using PR? Start there: build it with one collection of modules, and make a bitstream, and check that it works.
Then build the other version, and check it works. Once these both work independently, then go back to the PR flow.
PR is a very advanced topic and skill: one must be a master of the regular flow, first.
Xilinx San Jose
05-13-2012 08:13 AM
Further: it could be that in one partition, you have the IO defined one way, and then in another partition, the IO is re-definede to another standard, and the IO pin itself is not part of the partition, but part of the base design.
That is not recommended: io pins are best left out of the PR partitions, as the PR regions must be separate, non-overlapping, and distinct from each other.
Xilinx San Jose
05-13-2012 10:05 AM
What version of PlanAhead are you using? I've seen issue like this in the past that should be fixed in the latest version (13.4 or later). If you are using the latest version and still see this issue, please submit a webcase with Technical Support.
05-13-2012 06:24 PM
Thanks for your reply. I am using ISE 13.4 and PlanAhead 13.4
The PR regions are separate, non-overlapping and distinct from each other.
All IO pins are part of the base design.
While generating my PR .ngc file from ISE, I made sure to turn off the -iobuf option.
In the run that is failing, PlanAhead throws some info message saying the following:
[PlanAhead 566] Unisim Transformation Summary: A total of 630 instances were transformed. AUTOBUF => AUTOBUF (BUF): 1 instances IOBUF => IOBUF (OBUFT, IBUF): 64 instances IOBUFDS_DIFF_OUT => IOBUFDS_DIFF_OUT (IBUFDS, OBUFTDS, IBUFDS, OBUFTDS, INV): 8 instances OBUFDS => OBUFDS_DUAL_BUF (OBUFDS, OBUFDS, INV): 2 instances RAM32M => RAM32M (RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMS32, RAMS32): 226 instances RAM32X1D => RAM32X1D (RAMD32, RAMD32): 34 instances RAM32X1S => RAM32X1S (RAMS32): 7 instances RAM64X1D => RAM64X1D (RAMD64E, RAMD64E, VCC): 288 instances
If the IO standards are getting redefined I am not really sure how and why it is happening.
05-14-2012 08:41 AM
It may be the blackbox RM that is causing the problem. PlanAhead does some transformations you have seen in the messaging, and it may be attempting to transform things slightly different for the blackbox case.
I would really like to get a testacse for this. Can you please submit a webase and post the number here? This would also give us the opportunity to see if this is fixed in the 14.1 release.
05-14-2012 08:37 PM
My access request for a WebCase was denied, I guess because I am a student.
In any case, I think I found the problem.
After having completing a particular run, one needs to set the next Active Reconfigurable Modules.
Then click 'Close Netlist Design'
Re-open the Netlist Design and only then Launch the new implementation run.
After having carried out this tiny tweak in the PR flow, I was able to complete Implementation successfully for the PR design in question.
Thanks for your help. Appreciate the time taken out to try and help me.
01-11-2013 06:08 AM - edited 01-16-2013 02:15 AM
Same problem here. Using planAhead 13.4, I first have an info message:
[PlanAhead 566] Unisim Transformation Summary. A total of 779 instances were transformed. [...] OBUFDS => OBUFDS_DUAL_BUF (OBUFDS, OBUFDS, INV): 2 instances [...]
Then, the following:
ERROR:NgdBuild:1396 - IOSTANDARD value 'DUAL_BUF' is not valid for block 'ddr_ctrl/u_memc_ui_top/u_mem_intfc/phy_top0/u_phy
_clock_io/gen_ck.u_phy_c k_iob/u_obuf_ck' of type 'OBUFDS'. Original block type was 'OBUFDS_DUAL_BUF'.
Note that the error happens on the static part (DDR access), and that I have no such error when using ISE to implement the design without PR elements.
The workaround consisting in closing the netlist design before launching run seems to clear the problem, but I don't see how this operation changes anything to the run process...