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Visitor
konghouwwx
Posts: 2
Registered: ‎04-22-2012
0

A question about IBERT. Thank you.

Hi,all.

I use the IBERT CORE GENERATER(ISE13.2) to generate a IBERT core to test my rocketio,which connect with SFP(fibre channel).

However,the userguide(ug213) says,"

The GPIO (General Purpose I/O)options currently only include VIO core-controlled synchronous
output pins that can be used to control devices outside of the FPGA (such as SFP optical
modules)."

So I add GPIO connect to the SFP.But 

 

 

ERROR:Pack:2811 - Directed packing was unable to obey the user design
constraints (LOC=F2) which requires the combination of the symbols listed
below to be packed into a single OPAD component.

The directed pack was not possible because: More than one pad symbol.
The symbols involved are:
BUF symbol "TXP0_OPAD_0_OBUF" (Output Signal = TXP0_OPAD<0>)
PAD symbol "TXP0_OPAD<0>" (Pad Signal = TXP0_OPAD<0>)
PAD symbol "VIO_OPAD<0>" (Pad Signal = VIO_OPAD<0>)
ERROR:Pack:2811 - Directed packing was unable to obey the user design
constraints (LOC=G1) which requires the combination of the symbols listed
below to be packed into a single IPAD component.

 

My question is ,should I add the GPIO?The step above this shows that the MGT has connected TX pins and RX pins.I'm

confused.What's the purpose of GPIO?

 

Thank you very much!God bless you.

Xilinx Employee
mcgett
Posts: 3,503
Registered: ‎01-03-2008
0

Re: A question about IBERT. Thank you.

The GPIO function is intended for controlling IO on the target board that may be necessary for enabling clocks, rests, etc.. It looks like you have assigned the GPIO in your design to the MGT pins hitch is not correct.
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