I have a need to debug a remote FPGA and would like to use the XVC facility with Chipscope. My remote system has ethernet connected to a external processor, this is then connected to the FPGA via PCIe, the processor does not have any connection to the FPGA JTAG pins.
I don't have an embedded license so using Microblaze and its MDM in the FPGA isn't really an option.
I assume I would have to use an ICON with its BSCAN interface set to external, and then provide some way of controlling its BSCAN interface. For this BSCAN interface I assume I would have to implement my own TAP control state machine, either in software or the FPGA, and use this to provide the relevant signals.
So is it possible?
If so has anyone actually tried this and has any pointers?