Design Tools - Others

[alvaro27]

Hi,

I'm having problems with a project.This project has a Top level HDL module in which there are the following instantiations:

- XPS submodule added as a submodule (template HDL and its .xmp)
- VHDL modules
- chipscope core added with chipscope inserter (.cdc)

The problems come when I try to implement the design. The log says this:

ERROR:ChipScope: One or more invalid signal connections detected.
ERROR:ChipScope: Double-click the CORE_CHIPSCOPE.cdc icon in the sources window to edit and fix the CDC project.
ERROR: Chipscope Insertion failed

I would like to know what I´m doing wrong.I´ve read something about it but it doesn´t make sense to me because
I have created another project which only has the xps module and chipscope core and everything works properly when
I implement the design.

My opinion is there must be something wrong with the netlist but I´m not sure.
By the way,I´m using WEBPACK8.1,PLATFORM 8.1,CHIPSCOPE 8.1 in all programs.

If anyone can help,I will really apreciate it.
Thanks

[heritage]

Stop wasting your time its not going to work.  I have gotten chipscope working in 9.1 with EDK however is crashes a lot.  Its just a waste of time because both want the JTAG chain.  You can add a JTAG core for the PPC give that a  try bring out to spare IO.

[alvaro27]

Hi again

I dont know exactly what you mean. In my case,Ï think the only one is going to use

the JTAG is the chipscope core because I havent inserted any IP in my XPS module

which uses the JTAG.I think the microprocessor crashes if you added a ip for

debugging like for example a debug module and the chipscope core at the same time.

Please,let me know if you know more about this issue.

Thanks

[cbranson]

Alvero27-

I think that that error means that you have changed your netlist since you put in your chipscope source.  Open up your chipscope file and check all of the data/ clock/ trigger connections.  If any of them are red you have to get rid of/ reconnect them.

If you haven't used it before:  if you say you want 100 connections, you must connect all 100.  No connections can be left open.

Let me know if this fixes your problem.

[alvaro27]

Hi,

I have fixed the problem using the Chipscope Generator instead of using Chipscope Inserter. To be honest, I don´t know exactly what was wrong with my .cdc file but now

my design can be  implemented without getting any error.

Thanks for your help.