Design Tools - Others

[rourabpaul]

I am using 11.1 ise and vertex5 board.

When i opened xpower tool i got few extra signal in clock domain.

I am attaching a picture where you can see my main clock is named as ksa_clk but there are some other signals like ksa_clk_BUFG.

What is the siginificance of those signals?

I have another question is it neccessary to include ucf file to project during the power mesaurement by xpower analyzer tool

[austin]

r,

A global clock comes in through a IBUFG resource, then travels to the BUFG resource, and hencde onto the H-clock global clock tree.  The "leaves" of the tree (paths to the individual CLB (etc.) tiles are powered off to save power where it can be (where the clock is unused).  The report is detailing those resources which are being used.

[rourabpaul]

Thank you very much austin.
I have some other queries in this context. I am measuring power of my design using ise11.1(xpower). But when i check clock domain, i get my clock with zero frequency, then i have to change it manually. My question is why this is happening ? why I need to set frequency manually? pcf file is already there. I din not include ucf file. is this absence of ucf causing the abnormality?
with deep regards

[austin]

r,

I am not aware of any bugs like you describe, but in this older version, it may not have been automatically finding the frequency at all.

I would expect the ucf file to define the period for timing constraints, but it may also have been used to find the frequency of the clock.  I just do not know.

Play with it, see what happens if you add a simple period constraint.

[rourabpaul]

Ok

very shortly I'll communicate about this problem

[rourabpaul]

@austin
I have attached ucf with to my project, but again I got zero frequency at clock domain. Is there any solution?

[austin]

r,

XPower Analyzer relies upon stimulus data to estimate power consumption for
internal components. Accurately entering valid input frequencies and
toggle rates is necessary to generate a proper power estimate.

(from the FAQ on Xpower)

That means it needs to be in your .vcd file (vectors and stimulus).

http://www.google.com/url?sa=t&rct=j&q=xpower%20entering%20frequency&source=web&cd=1&ved=0CFIQFjAA&u...

[rourabpaul]

thanku for the link.

I was looking to genartae .vcd file by "Simulate Post-Place & Route Model". but here I found that my top level design "main.vhd" is unknown here, but its already included with my project.