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Digital Signal Processing - IP and Algorithms

Regular Visitor
Posts: 53
Registered: ‎02-01-2012

DCM question

Hi everyone

I want to convert my 10MHz clock into 1.048576MHZ ( 2^20). I tried to use DCM but when I want to choose my desire frequency an error occur and it said that I cannot have less than 18MHz. My FPGA is 3s50 -4. Are you guys have any idea how can I solve this problem or how can I convert 10MHz clock to 1.048576MHz?

Regards

Arash

Expert Contributor
Posts: 5,253
Registered: ‎08-14-2007

Re: DCM question

You can use the DCM to generate a multiple of the desired clock frequency and then

use a counter to divide it down to the required frequency.  For example you could

generate 25 times the frequency or 26.2144 MHz and then divide by 25 with logic.

There may be other approaches depending on your application.  For example if you can tolerate

a lot of jitter you can use direct digital frequency synthesis techniques.

Note that a DCM does not have large enough counters to directly generate this

exact frequency which would need a ratio of 8192/3125 so you may need to

use another approach if the exact frequency is important.

-- Gabor

-- Gabor
Regular Visitor
Posts: 53
Registered: ‎02-01-2012

Re: DCM question

Dear Gabor

Thanks. As you said I need exact frequency especially I need it as a input for DDS. You mentioned about other approach. Would you mind introduce me these approaches? I have no idea How to do this convert and I confused. I really appreciate if you can help me.

Regards

Arash

Expert Contributor
Posts: 5,253
Registered: ‎08-14-2007

Re: DCM question

arash-rezaee wrote:

Dear Gabor

Thanks. As you said I need exact frequency especially I need it as a input for DDS. You mentioned about other approach. Would you mind introduce me these approaches? I have no idea How to do this convert and I confused. I really appreciate if you can help me.

Regards

Arash

What sort of DDS?  e.g. is it an external IC (part number & data sheet link would ne nice) or something inside the FPGA?

What's your jitter tolerance for the DDS input clock?

Why does the DDS need to run on 2^20 Hz instead of 10 MHz or any other convenient frequency?

Depending on the answer to these questions, there may be a more ideal solution.

-- Gabor

-- Gabor
Regular Visitor
Posts: 53
Registered: ‎02-01-2012

Re: DCM question

Ok. I want to use DDS inside the FPGA. I want to have sine generator and from the equation of DDS datasheet is my frequency is equal with my phase increment input bit, I will have 1Hz resolution. So if I have the frequency of 2^20 and my phase increment set to 20 bit with every bit increment in phase increment input I will have 1Hz increment in the output. That is why I need it to be 2^20. For generating sine wave from 20Hz to 20KHz with 1Hz variation if you have any other idea please let me know.

Regards

Expert Contributor
Posts: 5,253
Registered: ‎08-14-2007

Re: DCM question

I guess it depends on the accuracy you need.  If you start with a non-power-of-two frequency,

like 1.000 MHz instead of 2^20 Hz, then you will not generate an exact frequency in Hz, but with

enough bits in the DDS phase, you can come at least as close as the accuracy of your timebase.

For example using 1.000 MHz and 32 bits of phase, your resolution would be about 0.000233 Hz.

For an output frquency of 20 Hz, this represents 11 ppm of error.  If you need to enter the frequency

in Hz, then you would need to add a multiplier to generate the correct phase increment.  On the

other hand, if for example the frequency is being requested by a microprocessor in your system,

then the frequency could be specified by its phase increment, and the microprocessor could do

the conversion from Hz to phase increment.

If you use the DDS compiler, you can generate a core with a clock enable.  You can then run this

core directly from 10 MHz and enable its clock for one cycle out of every 10, effectively running

the DDS at 1 MHz.  In that case you don't need a DCM.

Another approach that would give you an exact frequency would be to design your own DDS

that uses a decimal accumulator to directly divide 1 MHz down to 1 Hz.  This accumulator would have

6 digits, the phase increment would be in decimal, and the SIN / COS table would have

either 2 or 3 digits (100 ro 1000 elements).  While this approach would allow you to have "exact"

frequencies, it would be a lot more complex.

-- Gabor

-- Gabor
Expert Contributor
Posts: 2,010
Registered: ‎09-09-2010

Re: DCM question

Do you REALLY NEED exactly 1Hz resolution?

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"If it don't work in simulation, it won't work on the board."
Regular Visitor
Posts: 53
Registered: ‎02-01-2012

Re: DCM question

Yeah. I need 1Hz resolution as long as I want to generate sine wave from 20Hz to 20KHz.

Regards

Arash