Hello!
I am using a Nexys 2 board (made by Digilent) with a Spartan3E 1200 FPGA in it with an AD and a DA converter to filter audio signals. The converters are on additional Digilent made boards (PmodAD1 and PmodDA2) - both have 12 bit resolution.
I tried to implement some FIR filters with coefficients generated with Matlab's FDATool and generated with the Xilinx FIR Compiler.
Digilent has provided some reference components written in VHDL for both the AD and the DA converters, however these are driving the mentioned circuits at very high frequencies - the ADC is driven at 12.5 MHz, which is, as I understood, the sampling frequency. It's worthless to say that is very hard to generate low-order FIR filters for audio frequency filtering at this sampling frequency (actually this 12.5 MHz frequency should be divided bu 16, as the ADC sends a 16 bit long "pack" serially for each and every sample). So I have tried to reduce the sampling frequency to only 50 MHz / 64 (that is 781.25 kHz - which translates into 48.828 kHz for every bit in the 16 bit "pack") hoping that this will help me design more simple filters. When I ran the FIR Compiler to generate the corresponding filter (I tried several band pass filters at 1, 2 and 4 kHz) and tried it out, nothing was functioning. And by that I mean the in ALL cases the output of the DAC had exactly 5Vpp (whereas the input only had 0.5Vpp with 0.5V offset AND the reference voltage is 3.3V). Another probleam was that the filter didn't work as I expected but it generated some randomly changing rectangular wave with all-the-time-changing duty (mostly below 40%) - and this output was independent of the input, I have tried the signal generator with sinusoidal, rectangular and triangular waves too.
Does anyone have any idea what could cause this problem? I can attach the existing source code if needed.
Thank you in advance!
