Digital Signal Processing - IP and Algorithms

[assaf123]

Hello,

I have some question regarding the usage of VFBC and Video DMA core, for my system.

My system needs to do the following:

1. capture 30 frames (in a cyclic order) into DDR2 memmory. 

*resolution is 720*576 

*pixel value is 8 bit (grayscale)

2. performs image processing in cyclic order on all LATEST 30 frames

questions:

1. I read that Video DMA core is able to handle 16 frames buffer. but i need 30. is it possible to use two cores connected to 2 vfpc?

2. Why do i need the t Video DMA core? what are its benefits comparing to just using VFBC?

3. When tranfering data to write, shoud i fill the whole fifo first of all my pixels, or just pixel at a time?

4. Is the VFBC capable to handle pixels of 8 bit (not minimum of 32 bit)?

As you can see, i am confused on how the overal system should look like, whould i use 2 VFBC, ADD 2 DMA CORES, how to configure, etc... i would appricate if you can write down the configuration i should use as i think it can help other costumers as well

reards,

After reading several times the VFBC and Video DMA core documentation, i am not shure how it sable to build a system for my task.

[chrisar]

You are correct that the Video DMA only support up to 16 frames.  So cascading 2 cores is the only way to get a larger frame buffer size.

But before you get too far along I recommend looking into the AXI-VDMA, as it has superceeded the Video DMA.  It has a similar limit to the number of frames, but cascading add some more complexity to the system.

The bigger question is bandwidth.  You should really investigate that the overall system bandwidth will support the number of frames you are trying to deal with.

Do you have enough time to actually read all 30 frames before the next new frames comes into the system?  Make sure to look at the performance numbers of the IP and memory you choose to use when making the calculations.