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Regular Visitor
juansiahaan
Posts: 44
Registered: ‎04-16-2012
0
Accepted Solution

Help for real numbers to std_logic_vector conversion

Hi everyone,

 

Is it possible to convert real numbers to 12 bit vector? For example, I'm trying to convert a real number of 6.21 x 10^-5 into 12 bit std_logic_vector signal. Apparently the conv_tsd_logic_vector can't do that. Can anyone help me, Please?

 

Thanks and regards,

 

Juan

Expert Contributor
eilert
Posts: 2,055
Registered: ‎08-14-2007

Re: Help for real numbers to std_logic_vector conversion

Hi,

the FP-Operator IP-Core from the Xilinx Coregen might be what you are looking for.

Read the datasheet.

 

But this is only useful if you need this conversion inside your design.

If you just want to convert Matlab signals for use with sysgen, the "Gateway In" block does it anyway.

Just specifiy your desired output signal format as igned or unsigned fixed point of the desired witdth.

 

 

Have a nice synthesis

  Eilert

Regular Visitor
juansiahaan
Posts: 44
Registered: ‎04-16-2012
0

Re: Help for real numbers to std_logic_vector conversion

Hi Eilert thank you for your reply,

 

I found out that the FP-Operator IP Core has multiply function as well. Does that mean that I can use the real numbers (e.g. 0.0000651)  and multiply them with my own signal? What I'm trying to say is that I directly do the multiplication without converting the number first because the multiplication is what I'm trying to do.

 

Regards,

 

Juan

Expert Contributor
eilert
Posts: 2,055
Registered: ‎08-14-2007
0

Re: Help for real numbers to std_logic_vector conversion

Hi Juan,

make sure that the number format is exactly the same.

Then it should be no problem.

 

Do some simulations first.

 

Have a nice synthesis

    Eilert

 

Regular Visitor
juansiahaan
Posts: 44
Registered: ‎04-16-2012
0

Re: Help for real numbers to std_logic_vector conversion

Hi Eilert,

 

Thanks to remind me about the format that should be the same...

 

But I was wondering....is it possible for me to compare/multiply/add a floating point without using FP operator? WIll it give unexpected results?

 

Regards,

 

Juan

Expert Contributor
eilert
Posts: 2,055
Registered: ‎08-14-2007
0

Re: Help for real numbers to std_logic_vector conversion

Hi Juan,

comparing should be possible, as long as it's just for equal or not. Magnitude comparision is different.

 

For adding and multiplying, well if you aren't using the FP Operator and have no synthesis tool capable of VHDL2008, you need some other core that does FP Operations. e.g. there's some FPU available at opencores, I think.

 

How should results be unexpected? If you do the right thing they will be correct, if not they will be wrong.

Just know what you are doing and you will always get expectable results. ;-)

 

Have a nice synthesis

  Eilert

 

 

Regular Visitor
juansiahaan
Posts: 44
Registered: ‎04-16-2012
0

Re: Help for real numbers to std_logic_vector conversion

Hi Eilert,

 

Thanks again for your answer...really appreciate it.

 

I suppose everything should be expected...if we're doing it right...yes.

 

Regards,

 

Juan

Regular Visitor
juansiahaan
Posts: 44
Registered: ‎04-16-2012
0

Re: Help for real numbers to std_logic_vector conversion

Hi Eilert,

 

However I'm stil curious. Suppose I have a signal (let it be 12 or 8 bits) and I want to multiply that signal with a floating-point represented constant...how do I adjust the signal so that they can be multiplied because the GUI of FP requires 32 bit inputs for the signal (single precision)? or can it be done so that the operation can be done in 12 bit representation?

 

Regards,

 

Juan

Xilinx Employee
Xilinx Employee
ywu
Posts: 2,861
Registered: ‎11-28-2007

Re: Help for real numbers to std_logic_vector conversion

You can use the fixed point to floating pointor floating point to fixed point conversion cores (see the red rectangle on the snapshot below) from Core Generator if you need to convert between fixed point and floating point numbers.

 

ScreenHunter_169.jpg

 


juansiahaan wrote:

Hi Eilert,

 

However I'm stil curious. Suppose I have a signal (let it be 12 or 8 bits) and I want to multiply that signal with a floating-point represented constant...how do I adjust the signal so that they can be multiplied because the GUI of FP requires 32 bit inputs for the signal (single precision)? or can it be done so that the operation can be done in 12 bit representation?

 

Regards,

 

Juan




Cheers,
Jim
Regular Visitor
juansiahaan
Posts: 44
Registered: ‎04-16-2012
0

Re: Help for real numbers to std_logic_vector conversion

Hi Jim,

 

Yes I follow your suggestion and did some simulations and they work fine...thanks...

 

Regards,

 

Juan