Digital Signal Processing - IP and Algorithms

[mvly]

I have tried a lot of compiles and builds each with slightly different timing of the fwd_inv in and fwd_inv_en in signals. The wierd thing is that when I perform FFT, everything works fine (confirmed with matlab). It's only on the IFFT that I have a problem.

I tried inputting fwd_inv = 0 and fwd_inv_en = 1 at the same time as the rise of the start signal and it does not work (output still performing FFT).

I tried inputting fwd_inv = 0 and fwd_inv_en = 1 three cycles before rise of the start and it does not work (output still performing FFT).

I tried inputting fwd_inv = 0 and fwd_inv_en = 1 four cycles before the rise of the start and it does not work (output still performing FFT).

I also tried hardwiring the fwd_inv to 0 and still it performs a FFT!! (again confirmed with matlab)

I am using floating point FFT (25 bit phase factor) with NO 3 cycle delay on the data input line with natural order output with the following IOs:

rfd

start

fwd_inv

dv

unload

done

clk

busy

fwd_inv_we

edone

xn_re

xk_im

xn_index

xk_re

xn_im

xk_index

I am pretty certain my controller is working fine because the FFT works flawlessly. I am assuming that IFFT works the same way except that we need to change the fwd_inv and fwd_inv_en

Any help would be much appreciated.

[mvly · Accepted solution]

Nvm, found the solution:

http://myfpgablog.blogspot.com/2009/11/ifft-in-system-generator.html

I am not quite sure this is the answer, but I will do more testing to verify this.

[nibedita]

Hi,

I have usede IFFT core...I am giving fft of a sine wave as an input to this core.....I got the sine wave back...but in case of a bpsk signal I am not getting the result....I have hardwired the FWD_INV to 0.

[ywu]

You will also manually write FWD_INV value into the core by asserting FWD_IN_WE high for one cycle.

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nibedita wrote:

Hi,

I have usede IFFT core...I am giving fft of a sine wave as an input to this core.....I got the sine wave back...but in case of a bpsk signal I am not getting the result....I have hardwired the FWD_INV to 0.

---

[mofa77]

i meet the same problem
but i can't open the page(http://myfpgablog.blogspot.com/2009/11/ifft-in-system-generator.html)
can you tell me your solve way
thank you

[yahya.taher]

Hi Jim,

My problem is that I can do the FWD FFT for a sine wave, but when I fed back the real and imaginary parts to do the IFFT in the same core, considering all control signals, I got the sine wave in two parts also (imaginary and real) with some distortion, I mean I can plot its absolute value from the two parts (Im&Re) but all the peaks will be in the positive side (because of the absolute).

How can I make my reconstructed sine appear completely only in the real part, with zero or neglecable values in the Imaginary part???

With thanks

Yahya

[bwiec]

Do you actually see non-negligible data in the imaginary part? Or is it just roundoff/quantization errors...

[yahya.taher]

Hi

Just today I got the reconstructed sine in the real part. The imaginary part contains as you said some quantization noise. I have changed a little bit in the timing. Sine I didn't use timing simulation, but I built a VHDL controller to control the operation of the core.

Only  one question I have: if the time between the xn_index and the input data is less than 3 clocks, is it a big problem? I mean if it is 2 clocks.?

With thanks

Yahya

[bwiec]

Hello Yahya,

See the FFT datasheet (DS260), there is a section on "Applying Data" for the radix architectures which says:

If “No offset” was selected for the Input Data Timing parameter, the input data (XN_RE, XN_IM) corresponding to
the given XN_INDEX should arrive on the same cycle as the XN_INDEX it matches. The first data sample should
therefore be applied as soon as RFD goes High, such that the first sample pair is read into the core on the first transition
of XN_INDEX.
If “3 clock cycle offset” was selected for the Input Data Timing parameter, the input data (XN_RE, XN_IM) corresponding
to the given XN_INDEX should arrive three clock cycles later than the XN_INDEX it matches (see
Figure 11). In this way, XN_INDEX can be used to address external memory or a frame buffer storing the input data.

[yahya.taher]

Thanks for that, I did notice since I am using V.5 fft which doesn't have "Applying data " section in the data sheet. But my understanding that Applying data section should applied on both?

Regards

Yahya