A softcore is always a waste of silicon and only makes sence for certain applications, because it is a very expensive silicon. As soon as it comes to high performance C-applications, an external CPU quickly becomes much cheaper and requires less power too.
On the other hand hard cores exceed some limits of external wiring, but are much more expensive again, presented within an FPGA. The question is, if there is a market large enough for high performant DSP-apps, requiring these advantages. Often, a combination of a DSP-farm an some FPGAs does best - also in terms of debugging and availability of dev tools. Last but not least, DSP-Chips became very cheap nowadays.
GPU-element like functions do not realy make sense, if they replace FPGA-silicon, because they are not very much more versatile but though extreemly expensive in comparison. I'd prefer the more rudimentary DSP-elements. FPGAs containing GPU-aspects would be sold rarely and had a high price. Also the tasks typically placed in GPU-platforms are less effective than in FPGA, because the silicon in an FPGA is truely parallel, where the GPU-Chip-HW is not. GPU solutions are only much cheaper, but: for a certain reason: If one want's to make use of the GPU-like power and likes to take advantage of the low costs, this only works for chips with very very high lot numbers, so it's much better to order the GPU chips , add some to the FPGA-array and feed them in parallel. They have very effective RAM-controllers nowadays offering much parallel access.
Some friends of mine, do research on such plattforms, they e.g. have a board with 2 Virtex6 + 4 NIVIDA-Chips offering at least twice the IO-power (pipelined) and nearly three times the calculation power (FLOPS) than one would have, if one spent the same money on either only FPGAs or only GPU-Chips when focussing apps having typical balanced demands of signal processing.
Specialized Chips are allways the number one choice, if available - especially when it comes to complex behaviour.
FPGAs have their adavantage at strong pipelined processing, IO-based processing and in systems where requirements lead to very heterogenous structures, with a little demand on C-support (complex event handling). And they are very easily changeable, if this is required.
However, I do expect the DSP-elements in FPGAs becoming more complex in the future anyway. A first step would be 33x33 MUL, overcoming most DSP's data bus widths.
