Embedded Development Tools

[zecary]

Hi all,

I want to use BFM to run  a simulation in order to test the plb slave peripheral I created. Now, I've successfully installed the BFM package into Xilinx, and I typed xilbfc - check in xilinx shell and I got Success! But, when I tried to open "bfm_system.xmp" file created by EDK CIP wizard, an error "bfm_synch_v1_00_a was not found - please see console for more information" pop out.

What I'm gussing is that according to README (BFM simulation Guide ) in bfmsim, I should make sure I have satisfied all requirements before running gfm simulation:

- ModelSim 6.6d or later
- EDK BFM package installed
- ISE simulation libraries compiled (COMPXLIB)
- EDK simulation libraries compiled (COMPEDKLIB)

I'm using Isim. I assume this could satisfy term 1. And I've installed bfm package. So, the problem may come from the rest ones. How can I compile the ISE simulation libraries compiled (COMPXLIB) and EDK simulation libraries compiled (COMPEDKLIB)?

And in theis README file, section <BFM Simulation Command Line Flow>, the second step is

"2. Open the bfm_sim_cmd.make file, e.g. in DOS edit, to edit
   the following two stwitches if no (or incorrect) value is provided:

   ISELIB_OPT = -X <ISE simulation library path>
   EDKLIB_OPT = -E <EDK simulation library path>

   Save and close the make file, no other edits are required."

What should I type into <ISE simulation library path> and <EDK simulation library path>? 

Please please help me out of here. Thanks

Z

[pcurt · Accepted solution]

It's been a long time since I've used BFM, but reading your post, I would guess that the paths you need are the paths to your COMPXLIB and COMPEDKLIB, which you compiled in step 1.

[zecary]

pcurt,

Thanks very much. That's really helpful. Now, I'm able to open the bfm simulation. But another problem comes that I need to instantiate some fifo created by Coregenerator. How can I parse them into this bfm simulation? I tried use CIP wizard to update my peripheral but it seems that this doesn't work in bfm simulation.

[pcurt]

I'm not sure exactly what you are trying to do.  It sounds more specific to your project than BFM in general, but I could be mistaken.

The easiest way to instantiate cores in your project is to copy/paste the Core Generator instantiation templates.  If you are using VHDL, look for a .vho file that is written in the same folder as your core generator's output.

You may need to either paste this into an existing source file, or create a new source file where you wrap your existing code and the new fifo together, gluing the two together with some intermediate signals.