good morning,
I m trying to creat a new project whith EDK, after choosing system, processor, prephiral (i keep all default options) i have this error message in Xilinx ise:
"ERROR:EDK:3409 - Error calling proc
<CoreModel::ClockRequirements::update_clock_on_port>: syntax error in
expression "abs(41666666.0)": missing close parenthesis at end of function
call".
using Xilinx ise 14.1
OS: ubuntu 10.04 LTS
Someone can help me to fix it??
thanks
