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Super Contributor
kumar.anand743@gmail.com
Posts: 151
Registered: ‎01-05-2010
0

HDL for top level module.

Hi there,

 

I am a verilog designer with almost negligeble knowledge in VHDL.

However, when I use the 'Create and import Peripheral' wizard in XPS and I attach my peripheral to PLB, the top level module

always seems to be in VHDL.

Therefore the flexibility is reduced as far as I am concerned.

Could you kindly let me know if there s a way out?

 

Thank you

Expert Contributor
bassman59
Posts: 4,653
Registered: ‎02-25-2008
0

Re: HDL for top level module.

Ask in the EDK forum.


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Yes, I do this for a living.
Expert Contributor
golson
Posts: 879
Registered: ‎04-07-2008
0

Re: HDL for top level module.

Hi,

 You have an option to use a Verilog "Stub" file.  That is the User Logic file will be in verilog.  You can place your verilog

code within this file.

 

The Higher Level file IPIF_YourPeripheralName will be in VHDL.  The Higher Level IPIF VHDL file will

use the lower level verilog files.

Gary

 

There is not much about verilog useage in the XAPP967 App Note.  But it might be of some help.