11-02-2011 07:26 PM
I've got a microblaze with an iic (v.2.03a) interface running on AXI inside a Spartan-6... I also have a pc talking to a usb to iic device acting as the iic master. It works beautifully in that I can run the EDK slave example... set a slave address for my microblaze iic peripheral, and do reads and writes to that slave address, and my microblaze interrupts wonderfully and runs the slave example just fine.
The hitch I've run into is that I would like my FPGA to (still acting as a slave) respond to several slave different addresses. i.e. - I want my one FPGA iic peripheral to service and behave like a few different slaves.
I'm pretty new at this iic thing... but could use an idea or two on how to do this. I've thought that I might be able to:
1. roll up my sleeves and using some really low-level software calls manage the RX and TX fifo's and interpret/find/create the slave addresses there, but it seems that the interrupt system only sets the XII_MASTER_WRITE_EVENT or XII_MASTER_READ_EVENT if the slave address matches the set_slave_address in the register... I really want to be interrupted on any master read or write and I'll look at the slave address myself (if the slave address byte is actually in fact captured in the fifo) and determine if my FPGA is supposed to be the responder or not...
2. perhaps instantiate several iic peripherals (one per desired slave address) and wire them all to the same bi-di pins and hope for the best that they get wired internally and behave correctly (I could try this, but I have a fear that it won't get hooked up correctly or do something bad electrically...) plus it's seems to be a waste of hardware to replicate all that.
3. Is there some way to fake a multi-master inside the FPGA and when I see the external master do a slave read/write, somehow pick that up and go into slave response mode... again needing to be able to see the written slave address...
4. something else clever?
5. or (and this is my least desirable alternative since it seems like it will take more time)... handcraft my own custom iic peripheral which lets me see and control the entire iic bus protocol including the slave address...
Does this make any sense at all?
Any help, pointers, or ideas would be very much appreciated. Thanks in advance.