Hi,
So I created a microblaze system with some peripherals (timers, memory controllers, etc). I then created a simple FSL peripheral and generated the netlist, bitstream and selected export design to get into the SDK.
Once in the SDK, i firstly, created the board support package with the lwIP library included and created a new C project (the echo server). I added the test code for my peripheral right at the beginning of main:
XStatus stat;
stat = TCP_IF_SelfTest();
xil_printf("%d\n", stat);
I verified that the FPGA runs ok and when attaching a serial cable to the FPGA I can verify that the self test procedure is returning XST_SUCCESS.
So now I want to run a VHDL simulation so that I can see how the peripheral works and modify it to perform the correct purpose.
I went back to XPS, and set the Elf files section to be the elf files from my SDK project. I then set the serial port baud rate to be the highest becasue I read somewhere that could cause a problem. I then clicked generate netlist.
I clicked on Generate HDL Files and Launch Simulator. In ISIM, I ran: reset; w; run 3ms, which set up the clocks and resets, logged signals and started the simulation.
Now comes the bit I don't understand. There is no activity on the FSL bus for the entire 3ms and also the instruction bus for the microblaze remains constant with the instruction address bus also remaining constant as if the whole system has hung.
Any ideas? Have I missed a step somewhere. The documentation for this area is a bit lacking.
Cheers,
Scott
