07-06-2011 12:27 PM
I am using EdK 13.1, SP 601, I have developed NPI interface for MPMC. It is a 32 bit NPI, trying to write to DDR2. I have obsereved the NPI signals in chiscope, seems to be ok, but I could not find the values in DDR2, I am reading DDR2 from MicroBlaze-PLB slave. Using XMD, I am able to write to DDR2 and read from DDR2. But through NPI, I could not write.
I am trying to write to address zero. NPI clock and MPMC_clk0 are same and running at 100MHz. MPMC_2x clock is 300Mhz.
I have attached the chipscope analyzer waveforms . any solutions/comments are appreciated..thanks in advance..
How to add these NPI/VFBC bus signals to chipscope, everytime, I am genrating a new set of outputs for chipscope, seperately and connecting to ILA. somehow, I couldn't add VFBC or NPI buses XIL_NPI to chipscope?..
If the MPMC base address is 0x10 00 00 00 , and if I want write to the first location of memory, then I shoudl send 0x0 on NPI address bus, am I right?.
Solved! Go to Solution.
07-06-2011 12:36 PM
I could be wrong, but I thought that the address to the NPI port needs to match the
address map of the microblaze, so the memory base address would come from:
PARAMETER C_MPMC_BASEADDR = 0x10000000
At least that is how it worked in older versions of the MPMC. There may also be settings
for the port addressing when you customize and generate the MPMC.
07-06-2011 01:18 PM
Thanks for the quick reply Gabor, but I tried both, 0x0 address and MPM Base address, nothing is written to DDR2.
transactions on WR_FIFO EMPTY signal shows that, data is written to FIFO and tramitted out, but I read some junk data from those locations..thorugh PLB
07-06-2011 01:53 PM
Gabor is right, the address should be the address in your MHS (0x10000000)
assign byte enable all high '1
assign RdModWr = Addr_Req
is your chipscope triggering on ~4x ISIP_Clk?
make sure to wati for Addr_Ack before de-asserting Addr_Req
check your npi pcore too