03-03-2011 09:43 PM
i need a help regarding openSparc t1 processor.
My aim is to implement one core of the OpenSparc processor into the Xilinx FPGA.
I have downloaded and extracted the openSPARCT1.1.7.tar.bz2 and openSPARCt1.1.5.tar.bz2
Could you please tell me how can i download the RTL code of 1 core into FPGA using Xilinx.
Please explain step by step so that a begineer like me can understand it properly
04-20-2012 05:20 AM
I am also trying to implement the OpenSPARCT1 1.7 on my Xilinx FPGA XC5VLX110T. My aim is to run either the Single core 1-Thread or 4-Thread on FPGA and then boot the Solaris OS.
I am trying ot run the EDK Project already defined and along with the default Synplicity generated netlist. But I am unable to generate the bit-stream.
If you have already completed your project, could you please share some information with me?
04-20-2012 05:23 AM
Hey, are you succesful with your SPARC Implementation?
Is it possible to run OpenSPARC EDK Project directly on FPGA by simply using the pre-defined EDK Project along with Synplicity generated net-list, without implementing the simulation and synthesis as described in the DV_guide?