05-07-2012 09:01 AM
Here's something I discovered, painfully, and maybe will save someone else some grief, ot at least I'll maybe be able to read my own post next time I get stumped by this.
I have a custom V6 board in which I am implementing a microBlaze system. I had a basic system working before, but a more recent implementation did not work. I whittled it down to jsut the MB operating out of BRAM and tried to run a "Hello World" test, to no avail. The design had only two external port pins: ref_clock (25MHz) and reset (+true). XPS generated a system.ucf file, where I filled in the locations of the two pins, and added a pullup on reset:
# Generic Template
Net "fpga_0_clk_1_sys_clk_pin" TNM_NET = sys_clk_pin;
TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 25000 kHz;
Net "fpga_0_clk_1_sys_clk_pin" LOC= J9;
Net "fpga_0_rst_1_sys_rst_pin" TIG;
Net "fpga_0_rst_1_sys_rst_pin" LOC= W26;
Net "fpga_0_rst_1_sys_rst_pin" PULLUP;
The system wouldn't run, or would sort of, but did weird stuff. Turns out (after a couple days of head scratching) that the tools don't see the pullup when the constraint is placed in system.ucf (though they do see the LOC contraints). I had to create a separate, identical, .ucf and add it to the project in the project directory (not in system/data).
Does anybody understand why this is?
05-08-2012 02:29 PM - edited 05-08-2012 02:40 PM
For ISE projects, I recommend that you go ahead and place all of your pin location constraints and voltage family constraints ect. in a separate ucf file above the embedded directory. and remove that constraint information from the embedded/data ucf file.
(leaving all of the embedded system timing constraints in the system.ucf file)
I also put in my projects the timing constraint for the system clock in the new constraint file.. Additional logic timing constraints for logic not part of the embedded system (outside of the embedded system) I put in the upper (new constraint file). You will find if you use Pin Planning in Plan Ahead it will ask to create a ucf file in the ISE directory.
I think that the pullup constraint is just not put in the correct ucf file. The System is synthesized by itself and a constraint file is created during that process with a NCF extension. I think it is best to separate all of the pins out of that file for this reason.
And You have better control of your constraints.
05-08-2012 04:08 PM
Right, that's what I've always done before, but since there were only two pins involved, and the tools had created the .ucf for me, I thought I'd use it. But I've learned my lesson.
Thanks for the comment.