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[chen71730]

Hi,

I implement an NPI initiator to read image data from system memory(DRAM).

The DRAM controller is Xilinx MPMC and the buffer type is BRAM.

I ensure and follow the restriction about NPI interface namely

<1>address requests are no more than 4

<2>request data amount without any poping is less than 1024-byte

<3>request address is aligned to the request size

The first 4 requests are read back successfully. After that, RdFIFO_Empty signal of NPI interface is always high, this leads my overall transmission is hanging there.

Are there any possible reasons making that RdFIFO_Empty signal is always high?

Thanks.

[chen71730]

I did a series of experiments and I found that if my first request address is 4-word alignment, entire transmission (640x480 image) can be done without hanging again.

I check .mhs file, the data width is 32-bit. From MPMC data sheet, it has different meaning when transfer size is 0 (word for 32-bit NPI and double-word for 64-bit NPI). Word transfer size is what I want. Why my transmission will hang on if data size is already 32-bit?

If any suggestions, I would be thankful.

[lockiegrogan]

Hi,
When you load your address and receive the address ack, a time period later the read FIFO empty signal wil go low. At this point you can read data, but you must stop reading data when you have either exhausted your transfer length or the signal is high.

Once you have exhausted your transfer length you need to issue another address request for the next block of data. Typically the request lengths are 32 dwords.

From your explanation it does not look like you are issuing more than 1 address request.

Cheers,

[chen71730]

Hi,

Thanks for your replying.

Actually I use more aggressive strategy. I use a command FIFO to throttle the outstanding request. The command FIFO is 4 entries.

If I want ROI in 640x480 size image, VFBC interface will let my ROI setting become less flexibility due to its’ 128-byte alignment limitation. That’s the reason why I use NPI.

However, start address of ROI setting may not be 32-word alignment; it could be word-alignment (If the ROI width is limited at multiple of 4) so that word size transfer is needed.

Afterward I decrease my command FIFO entry from 4-entry to 3-entry or 2-entry, the entire transfer will go smoothly.