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Separate memories for heap and stack?
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05-30-2012 04:46 AM
Hi,
I implemented a Microblaze system with DDR3 access. Because I need quiet some heap, I need mapped it to the DDR RAM. Unfortunately EDK claims that the heap must always go together with the stack, i.e. also on the DDR RAM.
As expected, this slows down the applications running on Microblaze by around a factor of two in my case.
Why can't I separate heap (to DDR) and stack (to BRAM)? Is there any way around this limitation?
Thanks,
Regards,
martin
Solved! Go to Solution.
Re: Separate memories for heap and stack?
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05-30-2012 09:32 AM
v,
Did you see that this question was already asked, and answered?
http://forums.xilinx.com/t5/EDK-and-Platform-Studi
Principal Engineer
Xilinx San Jose
Re: Separate memories for heap and stack?
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05-31-2012 06:33 AM
Hi vbmazter,
you are right I had the same problem a while ago. Stack and heap can only be located together in the same memory region. Most probably the reason for this is the implementation of the run-time libraries (libxil.a, libc.a). These libs were developed for computer systems were heap and stack always go together in "external" DRAM. Libxil might be a more specific library for Xilinx purposes than libc, but the heap and stack management principles might rather be the same.
Re: Separate memories for heap and stack?
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06-04-2012 02:44 AM
@Mr. Lesea,
I read that thread several times, but I don't feel that it gives the answer to my question. They were talking about the bss segment...not sure why they mention heap there though. Sure, your colleague is saying there that the linker script can do any assignment I like, but that's not the case as I mentioned above.
@schneemann:
I second that. There seems no way around co-locating heap and stack unfortunately.
Thanks for your answers!
Re: Separate memories for heap and stack?
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07-04-2012 06:17 AM
Can you provide me a Xilinx ISE project which has a Microblaze and a DDR3 controller for Micron MT41J64M16LA device?
Spartan 6 XC6SLX45T is what i m using.
(My board is a custom board http://www.enterpoint.co.uk/raggedstone/RaggedSton
Thanks
Re: Separate memories for heap and stack?
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07-04-2012 06:17 AM
Hi,
Can you provide me a Xilinx ISE project which has a Microblaze and a DDR3 controller for Micron MT41J64M16LA device?
Spartan 6 XC6SLX45T is what i m using.
(My board is a custom board http://www.enterpoint.co.uk/raggedstone/RaggedSton
Thanks
metinburak@gmail.com











