I am trying to read data from a FIFO which is created by the "Create and Import Peripheral Wizard" for my user-IP on ML507 board. But the maximal speed I can achieve is 136Mbit/s. But the data speed send into the user-IP by the external IO is 165Mbit/s or higher. What properties mainly liminate this, and how to speed up this?
Currently I guess two ways may help:
1.Increase the FIFO clock. The FIFO clock seems to be the PLB bus clock. However, the maximal bus clock can be chosen in Clock Generator is 100Mhz and I'm using this.
2.Increase the PPC440 clock. The document say that the PPC440 can support a maximal 550Mhz input clock, but in Clock Generator the maximal clock can be choosen is 400Mhz. Is there any way to improve this?
3.Use DMA to read FIFO. Currently in my project, I use "ppc440mc_ddr" core to connect DDR2 directly to PPC440, not to PLB bus. How to use DMA under this condition?
I'm greatful for any suggections. Thanks!
