04-20-2012 04:29 AM
Hi! I am working on a project of audio filtering, and i'm using System Generator to create filtering modules that are exported into XPS.
Until now I have used FIFO's to write and read data into the modules.
But I would like to just connect the modules directly with a gateway instead.
So when I have added the custom IP into the xps project, I want to be able to send a "Xuint32 data" into the gateway_in, using the command XIo_Out32(ADDR, data);
and then get the processed data with the command
data = XIo_In(ADDR2);
However, i am not really sure how to accomplish this. As you can see, the gatein and gateout are unconnected in XPS.
Does someone know how to do this?
And if possible, could you give a quite detailed explanation?
04-20-2012 06:36 AM
I'm not completely sure based on your explanation, but I think using a Shared Register block in SysGen might be more what you're looking for. There's good documentation on this block in the SysGen User's Guide and Reference Guide.
Using the shared memories allows you to put them on your EDK memory map and write to those registers like any other peripheral. When using the gateway blocks, those are signals which must be connected elsewhere in your EDK system. My guess is that you're looking for the former.