Embedded Development Tools

[guoxuknight]

Experiment envirionment: ML501 + ISE/EDK 10.1

After I downloaded the 'bitstream' I launched the ‘XMD’, but the ‘MB’ and ‘MDM’ were not automatically connected. Then, I tried to connect them manually, but when I wrote the command "connect mb mdm", it showed the following error message:

XMD% connect mb mdm

Info:AutoDetecting cable. Please wait.
Info:Connecting to cable (Parallel Port - LPT1).
Info:Checking cable driver.
Info: Driver windrvr6.sys version = 8.1.1.0.Info: WinDriver v8.11 Jungo (c) 1997
 - 2006 Build Date: Oct 16 2006 X86 32bit SYS 12:35:07, version = 811.
Info: LPT base address = 0378h.
Info: ECP base address = 0778h.
Info:Cable connection failed.
Info:Connecting to cable (Parallel Port - LPT2).
Info:Checking cable driver.
Info: Driver windrvr6.sys version = 8.1.1.0.Info: WinDriver v8.11 Jungo (c) 1997
 - 2006 Build Date: Oct 16 2006 X86 32bit SYS 12:35:07, version = 811.
Info:Cable connection failed.
Info:Connecting to cable (Parallel Port - LPT3).
Info:Checking cable driver.
Info: Driver windrvr6.sys version = 8.1.1.0.Info: WinDriver v8.11 Jungo (c) 1997
 - 2006 Build Date: Oct 16 2006 X86 32bit SYS 12:35:07, version = 811.
Info:Cable connection failed.
Info:Connecting to cable (Parallel Port - LPT4).
Info:Checking cable driver.
Info: Driver windrvr6.sys version = 8.1.1.0.Info: WinDriver v8.11 Jungo (c) 1997
 - 2006 Build Date: Oct 16 2006 X86 32bit SYS 12:35:07, version = 811.
Info:Cable connection failed.
Info:Connecting to cable (Usb Port - USB21).
Info:Checking cable driver.
Info: Driver file xusbdfwu.sys found.
Info: Driver version: src=1027, dest=1027.
Info: Driver windrvr6.sys version = 8.1.1.0.Info: WinDriver v8.11 Jungo (c) 1997
 - 2006 Build Date: Oct 16 2006 X86 32bit SYS 12:35:07, version = 811.
Info: Cable PID = 0008.
Info: Max current requested during enumeration is 280 mA.
Info:Type = 0x0605.
Info: Cable Type = 3, Revision = 0.
Info: Setting cable speed to 6 MHz.
Info:Cable connection established.
Info:Firmware version = 1028.
Info:File version of C:/Xilinx/10.1/ISE/data/xusbdfwu.hex = 1028.
Info:Firmware hex file version = 1028.
Info:PLD file version = 0012h.
Info: PLD version = 0012h.

JTAG chain configuration
--------------------------------------------------
Device   ID Code        IR Length    Part Name
 1       f5059093          16        XCF32P
 2       59608093           8        xc95144xl
 3       0a001093           8        System_ACE
 4       22896093          10        XC5VLX50_U

MicroBlaze Processor Configuration :
-------------------------------------
Version............................7.10.b
Optimization.......................Performance
Interconnect.......................PLBv46
MMU Type...........................No_MMU
No of PC Breakpoints...............1
No of Read Addr/Data Watchpoints...0
No of Write Addr/Data Watchpoints..0
Instruction Cache Support..........off
Data Cache Support.................off
Exceptions  Support................off
FPU  Support.......................off
Hard Divider Support...............off
Hard Multiplier Support............on - (Mul32)
Barrel Shifter Support.............off
MSR clr/set Instruction Support....on
Compare Instruction Support........on
 ERROR: MicroBlaze is under RESET. Check if the Reset input to MicroBlaze and it
s Bus Interfaces are connected properly
        UNABLE to STOP MicroBlaze

XMD%

Has someone met the same error before? Does this mean I should manually change the RESET signal of Microblaze?

Thanks!

[olupj]

Hi,

If you have no clock (for unrelated reasons) this will happen.   Usually designs hold reset off until the clk gen (DCM, PLL) locks.

You don't need to change the reset, but make sure polarity is correct.

That said, needed mdm connections change when migrating from older  (opb_mdm 2.0a / mb 6.0) to newer debug modules.  I haven't changed to PLB 4.6.

-Jerry

[ggenest]

Hi,

I had a similar problem (ERROR: ... is under RESET) and didn't understand how to check that my clocks were all set properly.

When looking at my "Ports" connections in the "System Assembly View" I couldn't see the clock ports: in order to see them I had to change the "Filters" applied to my display. I enabled the display of all signals and I managed to modify the clock signals connections and it worked just fine!

G. 

[sen_dexcel]

i check all clock ports also then also same issue wat to do

[centaur19]

You may want to check the polarity of the reset on your board and compare it to what you have in your system. It is likely that there is a conflict here causing Microblaze to be held in reset.

[g.glowacki@wasko.pl]

For people how also experience this problem: Please check if You have properly configured clock in EDK, frequency, ports and even if it's connected to the device. It took me 4 days to relize that i had 32MHz clock where it should be 100MHz....

[dsavory]

Thanks guys-- been stuck on this problem for two days.  Had to re-assign the reset polarity and change the clk in my ucf file to 100MHz.  Kudos to you all-- again, much thanks.