06-12-2012 10:35 AM
I've noticed that there is a xilinx_gpio.c module to support AXI GPIOs in the FPGA. Once I have configured the kernel to include this module, what's a typical device tree entry to load the driver at boot? I need to add several channels of varying widths. Does the driver support device tree properties for label, base address, and channel widths?
Solved! Go to Solution.
06-12-2012 04:53 PM
The AXI GPIO entries would be the same as for MicroBlaze and PowerPC which is supported by the device tree generator. We need to do a wiki page with all device tree bindings it appears.
The soft IP (AXI GPIO) is not tested yet in Zynq to my knowledge.
You can look at the arch/microblaze/boot/dts for the GPIO or in arch/powerpc/boot/dts in the virtex dts files.